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author | Tony Gutierrez <anthony.gutierrez@amd.com> | 2015-07-20 09:15:18 -0500 |
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committer | Tony Gutierrez <anthony.gutierrez@amd.com> | 2015-07-20 09:15:18 -0500 |
commit | 3f68884c0e432cdc241ed0442e19ade0d74aa6f4 (patch) | |
tree | f8122e3390bb70e48b5490673e79450b09c7f996 /src/mem/protocol | |
parent | 3840a72f372600ca177ac8765d80853cc92988d0 (diff) | |
download | gem5-3f68884c0e432cdc241ed0442e19ade0d74aa6f4.tar.xz |
ruby: slicc: remove support for single machine, multiple types
This patch is imported from reviewboard patch 2550 by Nilay.
It was possible to specify multiple machine types with a single state machine.
This seems unnecessary and is being removed.
Diffstat (limited to 'src/mem/protocol')
-rw-r--r-- | src/mem/protocol/MOESI_hammer-cache.sm | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mem/protocol/MOESI_hammer-cache.sm b/src/mem/protocol/MOESI_hammer-cache.sm index f5a1d28c3..d4e7d7e3c 100644 --- a/src/mem/protocol/MOESI_hammer-cache.sm +++ b/src/mem/protocol/MOESI_hammer-cache.sm @@ -33,7 +33,7 @@ * Brad Beckmann */ -machine({L1Cache, L2Cache}, "AMD Hammer-like protocol") +machine(L1Cache, "AMD Hammer-like protocol") : Sequencer * sequencer; CacheMemory * L1Icache; CacheMemory * L1Dcache; |