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author | David Hashe <david.hashe@amd.com> | 2015-07-20 09:15:18 -0500 |
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committer | David Hashe <david.hashe@amd.com> | 2015-07-20 09:15:18 -0500 |
commit | 7e00772bda1a1c74fe659c56fea803642302c1da (patch) | |
tree | ade42a4e4b4bf3099c3c580045b3f9eaad8d789b /src/mem/protocol | |
parent | 3454a4a36e927f483b36fa66baabe2c85ecf3ddc (diff) | |
download | gem5-7e00772bda1a1c74fe659c56fea803642302c1da.tar.xz |
ruby: speed up function used for cache walks
This patch adds a few helpful functions that allow .sm files to directly
invalidate all cache blocks using a trigger queue rather than rely on each
individual cache block to be invalidated via requests from the mandatory
queue.
Diffstat (limited to 'src/mem/protocol')
-rw-r--r-- | src/mem/protocol/RubySlicc_Types.sm | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/src/mem/protocol/RubySlicc_Types.sm b/src/mem/protocol/RubySlicc_Types.sm index 88b9839bb..51f99b603 100644 --- a/src/mem/protocol/RubySlicc_Types.sm +++ b/src/mem/protocol/RubySlicc_Types.sm @@ -1,5 +1,6 @@ /* * Copyright (c) 1999-2005 Mark D. Hill and David A. Wood + * Copyright (c) 2013 Advanced Micro Devices, Inc. * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -155,6 +156,10 @@ structure (CacheMemory, external = "yes") { void recordRequestType(CacheRequestType); bool checkResourceAvailable(CacheResourceType, Address); + int getCacheSize(); + int getNumBlocks(); + Address getAddressAtIdx(int); + Scalar demand_misses; Scalar demand_hits; } |