diff options
author | Brad Beckmann <Brad.Beckmann@amd.com> | 2010-01-29 20:29:19 -0800 |
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committer | Brad Beckmann <Brad.Beckmann@amd.com> | 2010-01-29 20:29:19 -0800 |
commit | 2a0555470cfc66ab70544e97578c048822ec9282 (patch) | |
tree | 6f96f3fb5bf9f27b0c2c9032715907fa7939bc49 /src/mem/protocol | |
parent | 3b290a35aca3f6aba8226dde8387f38a9de39093 (diff) | |
download | gem5-2a0555470cfc66ab70544e97578c048822ec9282.tar.xz |
ruby: Converted MOESI_hammer dma cntrl to new config system
Diffstat (limited to 'src/mem/protocol')
-rw-r--r-- | src/mem/protocol/MOESI_hammer-dma.sm | 11 | ||||
-rw-r--r-- | src/mem/protocol/RubySlicc_Types.sm | 5 |
2 files changed, 8 insertions, 8 deletions
diff --git a/src/mem/protocol/MOESI_hammer-dma.sm b/src/mem/protocol/MOESI_hammer-dma.sm index 079485a05..12cf65c2f 100644 --- a/src/mem/protocol/MOESI_hammer-dma.sm +++ b/src/mem/protocol/MOESI_hammer-dma.sm @@ -28,7 +28,8 @@ machine(DMA, "DMA Controller") -: int request_latency = 6 +: DMASequencer * dma_sequencer, + int request_latency = 6 { MessageBuffer responseFromDir, network="From", virtual_network="4", ordered="true", no_vector="true"; @@ -47,20 +48,14 @@ machine(DMA, "DMA Controller") Ack, desc="DMA write to memory completed"; } - external_type(DMASequencer) { - void ackCallback(); - void dataCallback(DataBlock); - } - MessageBuffer mandatoryQueue, ordered="false", no_vector="true"; - DMASequencer dma_sequencer, factory='RubySystem::getDMASequencer(m_cfg["dma_sequencer"])', no_vector="true"; State cur_state, no_vector="true"; State getState(Address addr) { return cur_state; } void setState(Address addr, State state) { - cur_state := state; + cur_state := state; } out_port(reqToDirectory_out, DMARequestMsg, reqToDirectory, desc="..."); diff --git a/src/mem/protocol/RubySlicc_Types.sm b/src/mem/protocol/RubySlicc_Types.sm index 386ae2ee1..10e3711c5 100644 --- a/src/mem/protocol/RubySlicc_Types.sm +++ b/src/mem/protocol/RubySlicc_Types.sm @@ -122,6 +122,11 @@ external_type(MemoryControl, inport="yes", outport="yes") { } +external_type(DMASequencer) { + void ackCallback(); + void dataCallback(DataBlock); +} + external_type(TimerTable, inport="yes") { bool isReady(); Address readyAddress(); |