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| author | Tushar Krishna <Tushar.Krishna@amd.com> | 2009-08-07 13:59:40 -0700 |
|---|---|---|
| committer | Tushar Krishna <Tushar.Krishna@amd.com> | 2009-08-07 13:59:40 -0700 |
| commit | b952eb19c18bffcd4519bac19f79979fab477ff6 (patch) | |
| tree | bc9e34bce37742b5b85b76ff8be93a14b7c4e688 /src/mem/protocol | |
| parent | bd7af84d5ecd037fe4ab1a66948c51d23eb0eb0d (diff) | |
| download | gem5-b952eb19c18bffcd4519bac19f79979fab477ff6.tar.xz | |
bug fix for data_msg_size in network/Network.cc
Diffstat (limited to 'src/mem/protocol')
| -rw-r--r-- | src/mem/protocol/MOESI_CMP_directory-L2cache.sm | 2 | ||||
| -rw-r--r-- | src/mem/protocol/MOESI_CMP_token-L2cache.sm | 2 | ||||
| -rw-r--r-- | src/mem/protocol/MSI_MOSI_CMP_directory-L2cache.sm | 2 | ||||
| -rw-r--r-- | src/mem/protocol/RubySlicc_Util.sm | 1 |
4 files changed, 3 insertions, 4 deletions
diff --git a/src/mem/protocol/MOESI_CMP_directory-L2cache.sm b/src/mem/protocol/MOESI_CMP_directory-L2cache.sm index fa01f925c..50af743c2 100644 --- a/src/mem/protocol/MOESI_CMP_directory-L2cache.sm +++ b/src/mem/protocol/MOESI_CMP_directory-L2cache.sm @@ -1389,7 +1389,7 @@ machine(L2Cache, "Token protocol") { action(uu_profileMiss, "\u", desc="Profile the demand miss") { peek(L1requestNetwork_in, RequestMsg) { // AccessModeType not implemented - profile_L2Cache_miss(convertToGenericType(in_msg.Type), in_msg.AccessMode, MessageSizeTypeToInt(in_msg.MessageSize), in_msg.Prefetch, machineIDToNodeID(in_msg.Requestor)); + //profile_L2Cache_miss(convertToGenericType(in_msg.Type), in_msg.AccessMode, MessageSizeTypeToInt(in_msg.MessageSize), in_msg.Prefetch, machineIDToNodeID(in_msg.Requestor)); } } diff --git a/src/mem/protocol/MOESI_CMP_token-L2cache.sm b/src/mem/protocol/MOESI_CMP_token-L2cache.sm index 21fbf0b95..0a58ed5cf 100644 --- a/src/mem/protocol/MOESI_CMP_token-L2cache.sm +++ b/src/mem/protocol/MOESI_CMP_token-L2cache.sm @@ -916,7 +916,7 @@ machine(L2Cache, "Token protocol") { action(uu_profileMiss, "\u", desc="Profile the demand miss") { peek(L1requestNetwork_in, RequestMsg) { // AccessModeType not implemented - profile_L2Cache_miss(convertToGenericType(in_msg.Type), in_msg.AccessMode, MessageSizeTypeToInt(in_msg.MessageSize), in_msg.Prefetch, machineIDToNodeID(in_msg.Requestor)); + //profile_L2Cache_miss(convertToGenericType(in_msg.Type), in_msg.AccessMode, MessageSizeTypeToInt(in_msg.MessageSize), in_msg.Prefetch, machineIDToNodeID(in_msg.Requestor)); } } diff --git a/src/mem/protocol/MSI_MOSI_CMP_directory-L2cache.sm b/src/mem/protocol/MSI_MOSI_CMP_directory-L2cache.sm index d68efc819..9f85e3a8f 100644 --- a/src/mem/protocol/MSI_MOSI_CMP_directory-L2cache.sm +++ b/src/mem/protocol/MSI_MOSI_CMP_directory-L2cache.sm @@ -978,7 +978,7 @@ machine(L2Cache, "MOSI Directory L2 Cache CMP") { action(uu_profileMiss, "\u", desc="Profile the demand miss") { peek(L1RequestIntraChipL2Network_in, RequestMsg) { - profile_L2Cache_miss(convertToGenericType(in_msg.Type), in_msg.AccessMode, MessageSizeTypeToInt(in_msg.MessageSize), in_msg.Prefetch, L1CacheMachIDToProcessorNum(in_msg.RequestorMachId)); + //profile_L2Cache_miss(convertToGenericType(in_msg.Type), in_msg.AccessMode, MessageSizeTypeToInt(in_msg.MessageSize), in_msg.Prefetch, L1CacheMachIDToProcessorNum(in_msg.RequestorMachId)); } } diff --git a/src/mem/protocol/RubySlicc_Util.sm b/src/mem/protocol/RubySlicc_Util.sm index 7f7ebf5ed..2aa494fff 100644 --- a/src/mem/protocol/RubySlicc_Util.sm +++ b/src/mem/protocol/RubySlicc_Util.sm @@ -37,7 +37,6 @@ Time zero_time(); NodeID intToID(int nodenum); int IDToInt(NodeID id); int addressToInt(Address addr); -int MessageSizeTypeToInt(MessageSizeType size_type); bool multicast_retry(); int numberOfNodes(); int numberOfL1CachePerChip(); |