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| author | Brad Beckmann <Brad.Beckmann@amd.com> | 2009-08-11 12:22:41 -0700 |
|---|---|---|
| committer | Brad Beckmann <Brad.Beckmann@amd.com> | 2009-08-11 12:22:41 -0700 |
| commit | b89add1e3f0807219320b8f00f918876921a68ab (patch) | |
| tree | d7594f387b55768e07e261b96ac7cd9aad0a1c2b /src/mem/protocol | |
| parent | 1c3efb48ad6658bb9c92682ab8bac12fd69b8a9f (diff) | |
| parent | b952eb19c18bffcd4519bac19f79979fab477ff6 (diff) | |
| download | gem5-b89add1e3f0807219320b8f00f918876921a68ab.tar.xz | |
merged Tushar's bug fix with public repository changes
Diffstat (limited to 'src/mem/protocol')
| -rw-r--r-- | src/mem/protocol/MOESI_CMP_token-L2cache.sm | 2 | ||||
| -rw-r--r-- | src/mem/protocol/MSI_MOSI_CMP_directory-L2cache.sm | 2 | ||||
| -rw-r--r-- | src/mem/protocol/RubySlicc_Util.sm | 1 |
3 files changed, 2 insertions, 3 deletions
diff --git a/src/mem/protocol/MOESI_CMP_token-L2cache.sm b/src/mem/protocol/MOESI_CMP_token-L2cache.sm index 21fbf0b95..0a58ed5cf 100644 --- a/src/mem/protocol/MOESI_CMP_token-L2cache.sm +++ b/src/mem/protocol/MOESI_CMP_token-L2cache.sm @@ -916,7 +916,7 @@ machine(L2Cache, "Token protocol") { action(uu_profileMiss, "\u", desc="Profile the demand miss") { peek(L1requestNetwork_in, RequestMsg) { // AccessModeType not implemented - profile_L2Cache_miss(convertToGenericType(in_msg.Type), in_msg.AccessMode, MessageSizeTypeToInt(in_msg.MessageSize), in_msg.Prefetch, machineIDToNodeID(in_msg.Requestor)); + //profile_L2Cache_miss(convertToGenericType(in_msg.Type), in_msg.AccessMode, MessageSizeTypeToInt(in_msg.MessageSize), in_msg.Prefetch, machineIDToNodeID(in_msg.Requestor)); } } diff --git a/src/mem/protocol/MSI_MOSI_CMP_directory-L2cache.sm b/src/mem/protocol/MSI_MOSI_CMP_directory-L2cache.sm index d68efc819..9f85e3a8f 100644 --- a/src/mem/protocol/MSI_MOSI_CMP_directory-L2cache.sm +++ b/src/mem/protocol/MSI_MOSI_CMP_directory-L2cache.sm @@ -978,7 +978,7 @@ machine(L2Cache, "MOSI Directory L2 Cache CMP") { action(uu_profileMiss, "\u", desc="Profile the demand miss") { peek(L1RequestIntraChipL2Network_in, RequestMsg) { - profile_L2Cache_miss(convertToGenericType(in_msg.Type), in_msg.AccessMode, MessageSizeTypeToInt(in_msg.MessageSize), in_msg.Prefetch, L1CacheMachIDToProcessorNum(in_msg.RequestorMachId)); + //profile_L2Cache_miss(convertToGenericType(in_msg.Type), in_msg.AccessMode, MessageSizeTypeToInt(in_msg.MessageSize), in_msg.Prefetch, L1CacheMachIDToProcessorNum(in_msg.RequestorMachId)); } } diff --git a/src/mem/protocol/RubySlicc_Util.sm b/src/mem/protocol/RubySlicc_Util.sm index b37725402..312682bd7 100644 --- a/src/mem/protocol/RubySlicc_Util.sm +++ b/src/mem/protocol/RubySlicc_Util.sm @@ -37,7 +37,6 @@ Time zero_time(); NodeID intToID(int nodenum); int IDToInt(NodeID id); int addressToInt(Address addr); -int MessageSizeTypeToInt(MessageSizeType size_type); bool multicast_retry(); int numberOfNodes(); int numberOfL1CachePerChip(); |