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| author | Ciro Santilli <ciro.santilli@arm.com> | 2019-08-21 14:44:26 +0100 |
|---|---|---|
| committer | Ciro Santilli <ciro.santilli@arm.com> | 2019-08-22 10:37:41 +0000 |
| commit | 34b22c298c3fa742cb60b613f651874a869b93a0 (patch) | |
| tree | 8e7a2cf8d9f75704e32e46379e1bf4334f95b77a /src/mem/protocol | |
| parent | f8fbeae6fcd0797a36ccfec615d244b5e6220cd2 (diff) | |
| download | gem5-34b22c298c3fa742cb60b613f651874a869b93a0.tar.xz | |
mem-ruby: fix build with PROTOCOL=MOESI_hammer
Was failing with:
Error: Unrecognized variable: l1i_victim_addr
since: I2c43f22aba5af3a57e54b1c435e5d3fbba86d1d5
Change-Id: I7df666acb724ee541804dd7557753a9ba4005516
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/20261
Reviewed-by: Anthony Gutierrez <anthony.gutierrez@amd.com>
Reviewed-by: Pouya Fotouhi <pfotouhi@ucdavis.edu>
Maintainer: Anthony Gutierrez <anthony.gutierrez@amd.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Diffstat (limited to 'src/mem/protocol')
| -rw-r--r-- | src/mem/protocol/MOESI_hammer-cache.sm | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mem/protocol/MOESI_hammer-cache.sm b/src/mem/protocol/MOESI_hammer-cache.sm index 4086f42a8..66e1676d5 100644 --- a/src/mem/protocol/MOESI_hammer-cache.sm +++ b/src/mem/protocol/MOESI_hammer-cache.sm @@ -529,7 +529,7 @@ machine(MachineType:L1Cache, "AMD Hammer-like protocol") // No room in the L1, so we need to make room // Check if the line we want to evict is not locked Addr l1d_victim_addr := L1Dcache.cacheProbe(in_msg.LineAddress); - check_on_cache_probe(mandatoryQueue_in, l1i_victim_addr); + check_on_cache_probe(mandatoryQueue_in, l1d_victim_addr); if (L2cache.cacheAvail(l1d_victim_addr)) { // The L2 has room, so we move the line from the L1 to the L2 trigger(Event:L1_to_L2, |