diff options
author | Matt Horsnell <matt.horsnell@ARM.com> | 2014-01-24 15:29:30 -0600 |
---|---|---|
committer | Matt Horsnell <matt.horsnell@ARM.com> | 2014-01-24 15:29:30 -0600 |
commit | ca89eba79ebe0adc9cea7656c288e0381754171a (patch) | |
tree | 10446c49e315ae891e625ccae48c050b4e48737a /src/mem/request.hh | |
parent | daa781d2db938dcc7bea4455b03838fa5bf6ddbf (diff) | |
download | gem5-ca89eba79ebe0adc9cea7656c288e0381754171a.tar.xz |
mem: track per-request latencies and access depths in the cache hierarchy
Add some values and methods to the request object to track the translation
and access latency for a request and which level of the cache hierarchy responded
to the request.
Diffstat (limited to 'src/mem/request.hh')
-rw-r--r-- | src/mem/request.hh | 46 |
1 files changed, 45 insertions, 1 deletions
diff --git a/src/mem/request.hh b/src/mem/request.hh index a0ff50910..54b671645 100644 --- a/src/mem/request.hh +++ b/src/mem/request.hh @@ -1,5 +1,5 @@ /* - * Copyright (c) 2012 ARM Limited + * Copyright (c) 2012-2013 ARM Limited * All rights reserved * * The license below extends only to copyright in the software and shall @@ -244,6 +244,7 @@ class Request * default constructor.) */ Request() + : translateDelta(0), accessDelta(0), depth(0) {} /** @@ -304,6 +305,9 @@ class Request _flags.set(flags); privateFlags.clear(~STICKY_PRIVATE_FLAGS); privateFlags.set(VALID_PADDR|VALID_SIZE); + depth = 0; + accessDelta = 0; + //translateDelta = 0; } void @@ -331,6 +335,9 @@ class Request _flags.set(flags); privateFlags.clear(~STICKY_PRIVATE_FLAGS); privateFlags.set(VALID_VADDR|VALID_SIZE|VALID_PC); + depth = 0; + accessDelta = 0; + translateDelta = 0; } /** @@ -382,6 +389,23 @@ class Request } /** + * Time for the TLB/table walker to successfully translate this request. + */ + Tick translateDelta; + + /** + * Access latency to complete this memory transaction not including + * translation time. + */ + Tick accessDelta; + + /** + * Level of the cache hierachy where this request was responded to + * (e.g. 0 = L1; 1 = L2). + */ + int depth; + + /** * Accessor for size. */ bool @@ -535,6 +559,26 @@ class Request return _pc; } + /** + * Increment/Get the depth at which this request is responded to. + * This currently happens when the request misses in any cache level. + */ + void incAccessDepth() { depth++; } + int getAccessDepth() const { return depth; } + + /** + * Set/Get the time taken for this request to be successfully translated. + */ + void setTranslateLatency() { translateDelta = curTick() - _time; } + Tick getTranslateLatency() const { return translateDelta; } + + /** + * Set/Get the time taken to complete this request's access, not including + * the time to successfully translate the request. + */ + void setAccessLatency() { accessDelta = curTick() - _time - translateDelta; } + Tick getAccessLatency() const { return accessDelta; } + /** Accessor functions for flags. Note that these are for testing only; setting flags should be done via setFlags(). */ bool isUncacheable() const { return _flags.isSet(UNCACHEABLE); } |