cpu: Support virtual addr in elastic traces

This patch adds support to optionally capture the virtual address and asid
for load/store instructions in the elastic traces. If they are present in
the traces, Trace CPU will set those fields of the request during replay.

1 files changed, 8 insertions, 1 deletions

diff --git a/src/mem/request.hh b/src/mem/request.hh
index 177f17de2..287a823ad 100644
--- a/src/mem/request.hh
+++ b/src/mem/request.hh
@@ -300,7 +300,7 @@ class Request
     Addr _pc;
 
     /** Sequence number of the instruction that creates the request */
-    const InstSeqNum _reqInstSeqNum;
+    InstSeqNum _reqInstSeqNum;
 
   public:
 
@@ -675,6 +675,13 @@ class Request
         return _reqInstSeqNum;
     }
 
+    void
+    setReqInstSeqNum(const InstSeqNum seq_num)
+    {
+        privateFlags.set(VALID_INST_SEQ_NUM);
+        _reqInstSeqNum = seq_num;
+    }
+
     /** Accessor functions for flags.  Note that these are for testing
         only; setting flags should be done via setFlags(). */
     bool isUncacheable() const { return _flags.isSet(UNCACHEABLE); }