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authorAndreas Hansson <andreas.hansson@arm.com>2016-03-17 09:51:22 -0400
committerAndreas Hansson <andreas.hansson@arm.com>2016-03-17 09:51:22 -0400
commitabcbc4e51e21c95fa241d19ed13978ea25b26982 (patch)
tree40dc2f9b3fa227212c2dde335451122fbf4e8411 /src/mem/request.hh
parent7a40e7864a99140f18049a6f97163eebca2c891e (diff)
downloadgem5-abcbc4e51e21c95fa241d19ed13978ea25b26982.tar.xz
mem: Adjust cache queue reserve to more conservative values
The cache queue reserve is there as an overflow to give us enough headroom based on when we block the cache, and how many transactions we may already have accepted before actually blocking. The previous values were probably chosen to be "big enough", when we actually know that we check the MSHRs after every single allocation, and for the write buffers we know that we implicitly may need one entry for every outstanding MSHR. * * * mem: Adjust cache queue reserve to more conservative values The cache queue reserve is there as an overflow to give us enough headroom based on when we block the cache, and how many transactions we may already have accepted before actually blocking. The previous values were probably chosen to be "big enough", when we actually know that we check the MSHRs after every single allocation, and for the write buffers we know that we implicitly may need one entry for every outstanding MSHR.
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