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authorAndreas Hansson <andreas.hansson@arm.com>2015-03-23 06:57:34 -0400
committerAndreas Hansson <andreas.hansson@arm.com>2015-03-23 06:57:34 -0400
commit45286d9b64646bb4fe47f3ebf1815324dd6cb62b (patch)
treeefcddd18e01c2aeb26ea626c41a577bc88c9b484 /src/mem/request.hh
parented08dc31babd83c5c4a439b4d189599dfeea33d1 (diff)
downloadgem5-45286d9b64646bb4fe47f3ebf1815324dd6cb62b.tar.xz
mem: Tidy up Request
This patch does a bit of house keeping, fixing up typos, removing dead code etc.
Diffstat (limited to 'src/mem/request.hh')
-rw-r--r--src/mem/request.hh32
1 files changed, 8 insertions, 24 deletions
diff --git a/src/mem/request.hh b/src/mem/request.hh
index e844a6edb..25649a23a 100644
--- a/src/mem/request.hh
+++ b/src/mem/request.hh
@@ -108,11 +108,11 @@ class Request
/** The request is to an uncacheable address. */
static const FlagsType UNCACHEABLE = 0x00001000;
/** This request is to a memory mapped register. */
- static const FlagsType MMAPPED_IPR = 0x00002000;
+ static const FlagsType MMAPPED_IPR = 0x00002000;
/** This request is a clear exclusive. */
static const FlagsType CLEAR_LL = 0x00004000;
/** This request is made in privileged mode. */
- static const FlagsType PRIVILEGED = 0x00008000;
+ static const FlagsType PRIVILEGED = 0x00008000;
/** This is a write that is targeted and zeroing an entire cache block.
* There is no need for a read/modify/write
@@ -167,12 +167,12 @@ class Request
/** Invalid request id for assertion checking only. It is invalid behavior
* to ever send this id as part of a request.
* @todo C++1x replace with numeric_limits when constexpr is added */
- static const MasterID invldMasterId = USHRT_MAX;
+ static const MasterID invldMasterId = std::numeric_limits<MasterID>::max();
/** @} */
/** Invalid or unknown Pid. Possible when operating system is not present
* or has not assigned a pid yet */
- static const uint32_t invldPid = UINT_MAX;
+ static const uint32_t invldPid = std::numeric_limits<uint32_t>::max();
private:
typedef uint8_t PrivateFlagsType;
@@ -270,7 +270,7 @@ class Request
/** The context ID (for statistics, typically). */
int _contextId;
/** The thread ID (id within this CPU) */
- int _threadId;
+ ThreadID _threadId;
/** program counter of initiating access; for tracing/debugging */
Addr _pc;
@@ -325,8 +325,7 @@ class Request
}
Request(int asid, Addr vaddr, unsigned size, Flags flags, MasterID mid,
- Addr pc,
- int cid, ThreadID tid)
+ Addr pc, int cid, ThreadID tid)
: _paddr(0), _size(0), _masterId(invldMasterId), _time(0),
_taskId(ContextSwitchTaskId::Unknown), _asid(0), _vaddr(0),
_extraData(0), _contextId(0), _threadId(0), _pc(0),
@@ -357,7 +356,6 @@ class Request
setVirt(int asid, Addr vaddr, unsigned size, Flags flags, MasterID mid,
Addr pc)
{
- assert(size >= 0);
_asid = asid;
_vaddr = vaddr;
_size = size;
@@ -446,7 +444,7 @@ class Request
return privateFlags.isSet(VALID_SIZE);
}
- int
+ unsigned
getSize() const
{
assert(privateFlags.isSet(VALID_SIZE));
@@ -461,13 +459,6 @@ class Request
return _time;
}
- void
- time(Tick time)
- {
- assert(privateFlags.isSet(VALID_PADDR|VALID_VADDR));
- _time = time;
- }
-
/** Accessor for flags. */
Flags
getFlags()
@@ -487,13 +478,6 @@ class Request
_flags.set(flags);
}
- void
- setArchFlags(Flags flags)
- {
- assert(privateFlags.isSet(VALID_PADDR|VALID_VADDR));
- _flags.set(flags & ARCH_BITS);
- }
-
/** Accessor function for vaddr.*/
bool
hasVaddr() const
@@ -587,7 +571,7 @@ class Request
}
/** Accessor function for thread ID. */
- int
+ ThreadID
threadId() const
{
assert(privateFlags.isSet(VALID_THREAD_ID));