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| author | Nilay Vaish <nilay@cs.wisc.edu> | 2014-01-04 00:03:31 -0600 |
|---|---|---|
| committer | Nilay Vaish <nilay@cs.wisc.edu> | 2014-01-04 00:03:31 -0600 |
| commit | 5b1804e3bdb88aea7a198ff25617bb671cd34769 (patch) | |
| tree | 38c8644bb17caaa708e6c678f0f495d7db5f74dc /src/mem/ruby/common | |
| parent | 9853ef6651e76883615595bf76f983ed43234f96 (diff) | |
| download | gem5-5b1804e3bdb88aea7a198ff25617bb671cd34769.tar.xz | |
ruby: add support for clusters
A cluster over here means a set of controllers that can be accessed only by a
certain set of cores. For example, consider a two level hierarchy. Assume
there are 4 L1 controllers (private) and 2 L2 controllers. We can have two
different hierarchies here:
a. the address space is partitioned between the two L2 controllers. Each L1
controller accesses both the L2 controllers. In this case, each L1 controller
is a cluster initself.
b. both the L2 controllers can cache any address. An L1 controller has access
to only one of the L2 controllers. In this case, each L2 controller
along with the L1 controllers that access it, form a cluster.
This patch allows for each controller to have a cluster ID, which is 0 by
default. By setting the cluster ID properly, one can instantiate hierarchies
with clusters. Note that the coherence protocol might have to be changed as
well.
Diffstat (limited to 'src/mem/ruby/common')
| -rw-r--r-- | src/mem/ruby/common/NetDest.cc | 6 | ||||
| -rw-r--r-- | src/mem/ruby/common/TypeDefines.hh | 6 |
2 files changed, 6 insertions, 6 deletions
diff --git a/src/mem/ruby/common/NetDest.cc b/src/mem/ruby/common/NetDest.cc index f7508f1da..b8c490ac5 100644 --- a/src/mem/ruby/common/NetDest.cc +++ b/src/mem/ruby/common/NetDest.cc @@ -102,7 +102,7 @@ NetDest::broadcast() void NetDest::broadcast(MachineType machineType) { - for (int i = 0; i < MachineType_base_count(machineType); i++) { + for (NodeID i = 0; i < MachineType_base_count(machineType); i++) { MachineID mach = {machineType, i}; add(mach); } @@ -146,7 +146,7 @@ NetDest::smallestElement() const { assert(count() > 0); for (int i = 0; i < m_bits.size(); i++) { - for (int j = 0; j < m_bits[i].getSize(); j++) { + for (NodeID j = 0; j < m_bits[i].getSize(); j++) { if (m_bits[i].isElement(j)) { MachineID mach = {MachineType_from_base_level(i), j}; return mach; @@ -160,7 +160,7 @@ MachineID NetDest::smallestElement(MachineType machine) const { int size = m_bits[MachineType_base_level(machine)].getSize(); - for (int j = 0; j < size; j++) { + for (NodeID j = 0; j < size; j++) { if (m_bits[MachineType_base_level(machine)].isElement(j)) { MachineID mach = {machine, j}; return mach; diff --git a/src/mem/ruby/common/TypeDefines.hh b/src/mem/ruby/common/TypeDefines.hh index af1a6ca4c..391c9365a 100644 --- a/src/mem/ruby/common/TypeDefines.hh +++ b/src/mem/ruby/common/TypeDefines.hh @@ -37,8 +37,8 @@ typedef int64 Time; typedef uint64 physical_address_t; typedef int64 Index; // what the address bit ripper returns -typedef int LinkID; -typedef int NodeID; -typedef int SwitchID; +typedef unsigned int LinkID; +typedef unsigned int NodeID; +typedef unsigned int SwitchID; #endif |