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author | Derek Hower <drh5@cs.wisc.edu> | 2009-09-11 16:22:59 -0500 |
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committer | Derek Hower <drh5@cs.wisc.edu> | 2009-09-11 16:22:59 -0500 |
commit | 6fc2a4cadc5ba5c0068dc74120a5bc154ea543ca (patch) | |
tree | bb74cc70ac6858a3589d0f1242ce600ecf680f69 /src/mem/ruby/config/TwoLevel_SplitL1UnifiedL2.rb | |
parent | bd770274b013acd21caf6bd864a8e3374c06138e (diff) | |
download | gem5-6fc2a4cadc5ba5c0068dc74120a5bc154ea543ca.tar.xz |
ruby: cleaned up unified MESI/MOESI configuration
Diffstat (limited to 'src/mem/ruby/config/TwoLevel_SplitL1UnifiedL2.rb')
-rw-r--r-- | src/mem/ruby/config/TwoLevel_SplitL1UnifiedL2.rb | 24 |
1 files changed, 8 insertions, 16 deletions
diff --git a/src/mem/ruby/config/TwoLevel_SplitL1UnifiedL2.rb b/src/mem/ruby/config/TwoLevel_SplitL1UnifiedL2.rb index e20b7249e..b44813ab6 100644 --- a/src/mem/ruby/config/TwoLevel_SplitL1UnifiedL2.rb +++ b/src/mem/ruby/config/TwoLevel_SplitL1UnifiedL2.rb @@ -26,6 +26,7 @@ num_memories = 1 memory_size_mb = 1024 num_dma = 1 +#default protocol protocol = "MESI_CMP_directory" # check for overrides @@ -56,7 +57,7 @@ end net_ports = Array.new iface_ports = Array.new -#assert(protocol == "MESI_CMP_directory", __FILE__+" cannot be used with protocol "+protocol); +assert((protocol == "MESI_CMP_directory" or protocol == "MOESI_CMP_directory"), __FILE__+" cannot be used with protocol "+protocol); require protocol+".rb" @@ -71,9 +72,7 @@ num_cores.times { |n| icache, dcache, sequencer, num_l2_banks) - end - - if protocol == "MESI_CMP_directory" + elsif protocol == "MESI_CMP_directory" net_ports << MESI_CMP_directory_L1CacheController.new("L1CacheController_"+n.to_s, "L1Cache", icache, dcache, @@ -87,17 +86,14 @@ num_l2_banks.times { |n| net_ports << MOESI_CMP_directory_L2CacheController.new("L2CacheController_"+n.to_s, "L2Cache", cache) - net_ports.last.request_latency = l2_cache_latency + 2 - net_ports.last.response_latency = l2_cache_latency + 2 - end - - if protocol == "MESI_CMP_directory" + elsif protocol == "MESI_CMP_directory" net_ports << MESI_CMP_directory_L2CacheController.new("L2CacheController_"+n.to_s, "L2Cache", cache) end - + net_ports.last.request_latency = l2_cache_latency + 2 + net_ports.last.response_latency = l2_cache_latency + 2 } num_memories.times { |n| directory = DirectoryMemory.new("DirectoryMemory_"+n.to_s, memory_size_mb/num_memories) @@ -107,9 +103,7 @@ num_memories.times { |n| "Directory", directory, memory_control) - end - - if protocol == "MESI_CMP_directory" + elsif protocol == "MESI_CMP_directory" net_ports << MESI_CMP_directory_DirectoryController.new("DirectoryController_"+n.to_s, "Directory", directory, @@ -124,9 +118,7 @@ num_dma.times { |n| net_ports << MOESI_CMP_directory_DMAController.new("DMAController_"+n.to_s, "DMA", dma_sequencer) - end - - if protocol == "MESI_CMP_directory" + elsif protocol == "MESI_CMP_directory" net_ports << MESI_CMP_directory_DMAController.new("DMAController_"+n.to_s, "DMA", dma_sequencer) |