diff options
author | Derek Hower <drh5@cs.wisc.edu> | 2009-09-11 14:17:21 -0500 |
---|---|---|
committer | Derek Hower <drh5@cs.wisc.edu> | 2009-09-11 14:17:21 -0500 |
commit | bd770274b013acd21caf6bd864a8e3374c06138e (patch) | |
tree | 0f0334fd66b466b2162db88be3d11f0a65e16c09 /src/mem/ruby/config/TwoLevel_SplitL1UnifiedL2.rb | |
parent | 1e40ee4ea081908782dd7ba159b9f680d933855c (diff) | |
parent | 8cdd7265ce1026a58fd0280a4f80f3ba8441c9aa (diff) | |
download | gem5-bd770274b013acd21caf6bd864a8e3374c06138e.tar.xz |
merge
Diffstat (limited to 'src/mem/ruby/config/TwoLevel_SplitL1UnifiedL2.rb')
-rw-r--r-- | src/mem/ruby/config/TwoLevel_SplitL1UnifiedL2.rb | 36 |
1 files changed, 34 insertions, 2 deletions
diff --git a/src/mem/ruby/config/TwoLevel_SplitL1UnifiedL2.rb b/src/mem/ruby/config/TwoLevel_SplitL1UnifiedL2.rb index aa176d0f1..e20b7249e 100644 --- a/src/mem/ruby/config/TwoLevel_SplitL1UnifiedL2.rb +++ b/src/mem/ruby/config/TwoLevel_SplitL1UnifiedL2.rb @@ -26,7 +26,7 @@ num_memories = 1 memory_size_mb = 1024 num_dma = 1 -protocol = "MOESI_CMP_directory" +protocol = "MESI_CMP_directory" # check for overrides @@ -56,7 +56,7 @@ end net_ports = Array.new iface_ports = Array.new -assert(protocol == "MOESI_CMP_directory", __FILE__+" cannot be used with protocol "+protocol); +#assert(protocol == "MESI_CMP_directory", __FILE__+" cannot be used with protocol "+protocol); require protocol+".rb" @@ -72,6 +72,14 @@ num_cores.times { |n| sequencer, num_l2_banks) end + + if protocol == "MESI_CMP_directory" + net_ports << MESI_CMP_directory_L1CacheController.new("L1CacheController_"+n.to_s, + "L1Cache", + icache, dcache, + sequencer, + num_l2_banks) + end } num_l2_banks.times { |n| cache = SetAssociativeCache.new("l2u_"+n.to_s, l2_cache_size_kb/num_l2_banks, l2_cache_latency, l2_cache_assoc, "PSEUDO_LRU") @@ -82,6 +90,14 @@ num_l2_banks.times { |n| net_ports.last.request_latency = l2_cache_latency + 2 net_ports.last.response_latency = l2_cache_latency + 2 end + + if protocol == "MESI_CMP_directory" + net_ports << MESI_CMP_directory_L2CacheController.new("L2CacheController_"+n.to_s, + "L2Cache", + cache) + end + + } num_memories.times { |n| directory = DirectoryMemory.new("DirectoryMemory_"+n.to_s, memory_size_mb/num_memories) @@ -92,6 +108,14 @@ num_memories.times { |n| directory, memory_control) end + + if protocol == "MESI_CMP_directory" + net_ports << MESI_CMP_directory_DirectoryController.new("DirectoryController_"+n.to_s, + "Directory", + directory, + memory_control) + end + } num_dma.times { |n| dma_sequencer = DMASequencer.new("DMASequencer_"+n.to_s) @@ -101,6 +125,14 @@ num_dma.times { |n| "DMA", dma_sequencer) end + + if protocol == "MESI_CMP_directory" + net_ports << MESI_CMP_directory_DMAController.new("DMAController_"+n.to_s, + "DMA", + dma_sequencer) + end + + } topology = CrossbarTopology.new("theTopology", net_ports) |