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authorTushar Krishna <tushar@ece.gatech.edu>2016-10-06 14:35:20 -0400
committerTushar Krishna <tushar@ece.gatech.edu>2016-10-06 14:35:20 -0400
commit0962d768270696395dacfbd2ceabe4ee1035a496 (patch)
tree21feb5b3453c613dd4c35f0177b5333f97a5d967 /src/mem/ruby/network/simple/SimpleNetwork.hh
parent003c08fa90f8b3eb7fbbbc96e0caa5f46bf58196 (diff)
downloadgem5-0962d768270696395dacfbd2ceabe4ee1035a496.tar.xz
config: add port directions and per-router delay in topology.
This patch adds port direction names to the links during topology creation, which can be used for better printed names for the links or for users to code up their own adaptive routing algorithms. It also adds support for every router to have an independent latency value to support heterogeneous topologies with the subsequent garnet2.0 patch.
Diffstat (limited to 'src/mem/ruby/network/simple/SimpleNetwork.hh')
-rw-r--r--src/mem/ruby/network/simple/SimpleNetwork.hh4
1 files changed, 3 insertions, 1 deletions
diff --git a/src/mem/ruby/network/simple/SimpleNetwork.hh b/src/mem/ruby/network/simple/SimpleNetwork.hh
index 6a325d2a4..8b870e735 100644
--- a/src/mem/ruby/network/simple/SimpleNetwork.hh
+++ b/src/mem/ruby/network/simple/SimpleNetwork.hh
@@ -64,7 +64,9 @@ class SimpleNetwork : public Network
void makeExtInLink(NodeID src, SwitchID dest, BasicLink* link,
const NetDest& routing_table_entry);
void makeInternalLink(SwitchID src, SwitchID dest, BasicLink* link,
- const NetDest& routing_table_entry);
+ const NetDest& routing_table_entry,
+ PortDirection src_outport,
+ PortDirection dst_inport);
void print(std::ostream& out) const;