diff options
author | Brad Beckmann <Brad.Beckmann@amd.com> | 2010-01-29 20:29:22 -0800 |
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committer | Brad Beckmann <Brad.Beckmann@amd.com> | 2010-01-29 20:29:22 -0800 |
commit | f88faa6c11bbb5c5f95fe32ccffca73c7c4758c8 (patch) | |
tree | 73f1ccfa1f56d86a8787f6e04a8c2cb116167e8c /src/mem/ruby/profiler/Profiler.hh | |
parent | cfe41d0a1bc3b778995cd1b22f8d58037300143b (diff) | |
download | gem5-f88faa6c11bbb5c5f95fe32ccffca73c7c4758c8.tar.xz |
ruby: cleaned up ruby profilers
Cleaned up the ruby profilers by moving the memory controller profiling code
out of the main profiler object and into a separate object similar to the
current CacheProfiler. Both the CacheProfiler and MemCntrlProfiler are
specific to a particular Ruby object, CacheMemory and MemoryControl
respectively. Therefore, these profilers should not be SimObjects and
created by the python configuration system, but instead private objects. This
simplifies the creation of these profilers.
Diffstat (limited to 'src/mem/ruby/profiler/Profiler.hh')
-rw-r--r-- | src/mem/ruby/profiler/Profiler.hh | 45 |
1 files changed, 0 insertions, 45 deletions
diff --git a/src/mem/ruby/profiler/Profiler.hh b/src/mem/ruby/profiler/Profiler.hh index 4af0f559d..b142e94a3 100644 --- a/src/mem/ruby/profiler/Profiler.hh +++ b/src/mem/ruby/profiler/Profiler.hh @@ -79,29 +79,6 @@ class AddressProfiler; template <class KEY_TYPE, class VALUE_TYPE> class Map; -struct memory_control_profiler { - uint64 m_memReq; - uint64 m_memBankBusy; - uint64 m_memBusBusy; - uint64 m_memTfawBusy; - uint64 m_memReadWriteBusy; - uint64 m_memDataBusBusy; - uint64 m_memRefresh; - uint64 m_memRead; - uint64 m_memWrite; - uint64 m_memWaitCycles; - uint64 m_memInputQ; - uint64 m_memBankQ; - uint64 m_memArbWait; - uint64 m_memRandBusy; - uint64 m_memNotOld; - Vector<uint64> m_memBankCount; - int m_banks_per_rank; - int m_ranks_per_dimm; - int m_dimms_per_channel; -}; - - class Profiler : public SimObject, public Consumer { public: // Constructors @@ -170,29 +147,11 @@ public: return m_ruby_start; } - // added for MemoryControl: - void profileMemReq(int mem_cntrl, int bank); - void profileMemBankBusy(int mem_cntrl); - void profileMemBusBusy(int mem_cntrl); - void profileMemTfawBusy(int mem_cntrl); - void profileMemReadWriteBusy(int mem_cntrl); - void profileMemDataBusBusy(int mem_cntrl); - void profileMemRefresh(int mem_cntrl); - void profileMemRead(int mem_cntrl); - void profileMemWrite(int mem_cntrl); - void profileMemWaitCycles(int mem_cntrl, int cycles); - void profileMemInputQ(int mem_cntrl, int cycles); - void profileMemBankQ(int mem_cntrl, int cycles); - void profileMemArbWait(int mem_cntrl, int cycles); - void profileMemRandBusy(int mem_cntrl); - void profileMemNotOld(int mem_cntrl); //added by SS bool getHotLines() { return m_hot_lines; } bool getAllInstructions() { return m_all_instructions; } private: - //added by SS - vector<string> m_memory_control_names; // Private copy constructor and assignment operator Profiler(const Profiler& obj); @@ -255,10 +214,6 @@ private: int m_requests; Map <string, int>* m_requestProfileMap_ptr; - // added for MemoryControl: - //added by SS - Vector < memory_control_profiler* > m_mc_profilers; - //added by SS bool m_hot_lines; bool m_all_instructions; |