ruby: replace Time with Cycles (final patch in the series)

This patch is as of now the final patch in the series of patches that replace
Time with Cycles.This patch further replaces Time with Cycles in Sequencer,
Profiler, different protocols and related entities.

Though Time has not been completely removed, the places where it is in use
seem benign as of now.

2 files changed, 26 insertions, 36 deletions

diff --git a/src/mem/ruby/profiler/Profiler.cc b/src/mem/ruby/profiler/Profiler.cc
index 165561fe8..e15285784 100644
--- a/src/mem/ruby/profiler/Profiler.cc
+++ b/src/mem/ruby/profiler/Profiler.cc
@@ -270,7 +270,7 @@ Profiler::printStats(ostream& out, bool short_stats)
     double minutes = seconds / 60.0;
     double hours = minutes / 60.0;
     double days = hours / 24.0;
-    Time ruby_cycles = g_system_ptr->getTime()-m_ruby_start;
+    Cycles ruby_cycles = g_system_ptr->getTime()-m_ruby_start;
 
     if (!short_stats) {
         out << "Elapsed_time_in_seconds: " << seconds << endl;
@@ -609,7 +609,7 @@ Profiler::profileSharing(const Address& addr, AccessType type,
 }
 
 void
-Profiler::profilePFWait(Time waitTime)
+Profiler::profilePFWait(Cycles waitTime)
 {
     m_prefetchWaitHistogram.add(waitTime);
 }
@@ -622,7 +622,7 @@ Profiler::bankBusy()
 
 // non-zero cycle demand request
 void
-Profiler::missLatency(Time cycles, 
+Profiler::missLatency(Cycles cycles,
                       RubyRequestType type,
                       const GenericMachineType respondingMach)
 {
@@ -633,11 +633,11 @@ Profiler::missLatency(Time cycles,
 }
 
 void
-Profiler::missLatencyWcc(Time issuedTime,
-                         Time initialRequestTime,
-                         Time forwardRequestTime,
-                         Time firstResponseTime,
-                         Time completionTime)
+Profiler::missLatencyWcc(Cycles issuedTime,
+                         Cycles initialRequestTime,
+                         Cycles forwardRequestTime,
+                         Cycles firstResponseTime,
+                         Cycles completionTime)
 {
     if ((issuedTime <= initialRequestTime) &&
         (initialRequestTime <= forwardRequestTime) &&
@@ -659,11 +659,11 @@ Profiler::missLatencyWcc(Time issuedTime,
 }
 
 void
-Profiler::missLatencyDir(Time issuedTime,
-                         Time initialRequestTime,
-                         Time forwardRequestTime,
-                         Time firstResponseTime,
-                         Time completionTime)
+Profiler::missLatencyDir(Cycles issuedTime,
+                         Cycles initialRequestTime,
+                         Cycles forwardRequestTime,
+                         Cycles firstResponseTime,
+                         Cycles completionTime)
 {
     if ((issuedTime <= initialRequestTime) &&
         (initialRequestTime <= forwardRequestTime) &&
@@ -686,13 +686,13 @@ Profiler::missLatencyDir(Time issuedTime,
 
 // non-zero cycle prefetch request
 void
-Profiler::swPrefetchLatency(Time cycles, 
-                            RubyRequestType type,
+Profiler::swPrefetchLatency(Cycles cycles, RubyRequestType type,
                             const GenericMachineType respondingMach)
 {
     m_allSWPrefetchLatencyHistogram.add(cycles);
     m_SWPrefetchLatencyHistograms[type].add(cycles);
     m_SWPrefetchMachLatencyHistograms[respondingMach].add(cycles);
+
     if (respondingMach == GenericMachineType_Directory ||
         respondingMach == GenericMachineType_NUM) {
         m_SWPrefetchL2MissLatencyHistogram.add(cycles);
diff --git a/src/mem/ruby/profiler/Profiler.hh b/src/mem/ruby/profiler/Profiler.hh
index ecd57c035..421e8fe55 100644
--- a/src/mem/ruby/profiler/Profiler.hh
+++ b/src/mem/ruby/profiler/Profiler.hh
@@ -125,29 +125,23 @@ class Profiler : public SimObject
 
     void startTransaction(int cpu);
     void endTransaction(int cpu);
-    void profilePFWait(Time waitTime);
+    void profilePFWait(Cycles waitTime);
 
     void controllerBusy(MachineID machID);
     void bankBusy();
 
-    void missLatency(Time t, 
-                     RubyRequestType type,
+    void missLatency(Cycles t, RubyRequestType type,
                      const GenericMachineType respondingMach);
 
-    void missLatencyWcc(Time issuedTime,
-                        Time initialRequestTime,
-                        Time forwardRequestTime,
-                        Time firstResponseTime,
-                        Time completionTime);
+    void missLatencyWcc(Cycles issuedTime, Cycles initialRequestTime,
+                        Cycles forwardRequestTime, Cycles firstResponseTime,
+                        Cycles completionTime);
     
-    void missLatencyDir(Time issuedTime,
-                        Time initialRequestTime,
-                        Time forwardRequestTime,
-                        Time firstResponseTime,
-                        Time completionTime);
+    void missLatencyDir(Cycles issuedTime, Cycles initialRequestTime,
+                        Cycles forwardRequestTime, Cycles firstResponseTime,
+                        Cycles completionTime);
     
-    void swPrefetchLatency(Time t, 
-                           RubyRequestType type,
+    void swPrefetchLatency(Cycles t, RubyRequestType type,
                            const GenericMachineType respondingMach);
 
     void sequencerRequests(int num) { m_sequencer_requests.add(num); }
@@ -158,11 +152,7 @@ class Profiler : public SimObject
     bool watchAddress(Address addr);
 
     // return Ruby's start time
-    Time
-    getRubyStartTime()
-    {
-        return m_ruby_start;
-    }
+    Cycles getRubyStartTime() { return m_ruby_start; }
 
     // added by SS
     bool getHotLines() { return m_hot_lines; }
@@ -186,7 +176,7 @@ class Profiler : public SimObject
     std::ostream* m_periodic_output_file_ptr;
     int64_t m_stats_period;
 
-    Time m_ruby_start;
+    Cycles m_ruby_start;
     time_t m_real_time_start_time;
 
     int64_t m_busyBankCount;