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authorNilay Vaish <nilay@cs.wisc.edu>2013-06-09 07:30:00 -0500
committerNilay Vaish <nilay@cs.wisc.edu>2013-06-09 07:30:00 -0500
commitd32ee94231251b8d07bb811142f6759f8655962b (patch)
treea24ed61aa319cd64ea08e7236a3f1d9322c204bd /src/mem/ruby/profiler
parent27b321f2f7d230dfc84ee742fd415f0828e1d862 (diff)
downloadgem5-d32ee94231251b8d07bb811142f6759f8655962b.tar.xz
ruby: remove several unused variables in Profiler
This patch removes per processor cycle count, histogram for filter stats, histogram for multicasts, histogram for prefetch wait, some function prototypes that do not have definitions.
Diffstat (limited to 'src/mem/ruby/profiler')
-rw-r--r--src/mem/ruby/profiler/Profiler.cc25
-rw-r--r--src/mem/ruby/profiler/Profiler.hh15
2 files changed, 0 insertions, 40 deletions
diff --git a/src/mem/ruby/profiler/Profiler.cc b/src/mem/ruby/profiler/Profiler.cc
index c608358f7..76c4dba74 100644
--- a/src/mem/ruby/profiler/Profiler.cc
+++ b/src/mem/ruby/profiler/Profiler.cc
@@ -265,18 +265,6 @@ Profiler::printStats(ostream& out, bool short_stats)
out << endl;
}
- vector<int64_t> perProcCycleCount(m_num_of_sequencers);
-
- for (int i = 0; i < m_num_of_sequencers; i++) {
- perProcCycleCount[i] =
- g_system_ptr->curCycle() - m_cycles_executed_at_start[i] + 1;
- // The +1 allows us to avoid division by zero
- }
-
- out << "ruby_cycles_executed: " << perProcCycleCount << endl;
-
- out << endl;
-
if (!short_stats) {
out << "Busy Controller Counts:" << endl;
for (uint32_t i = 0; i < MachineType_NUM; i++) {
@@ -403,8 +391,6 @@ Profiler::printStats(ostream& out, bool short_stats)
printRequestProfile(out);
- out << "filter_action: " << m_filter_action_histogram << endl;
-
if (!m_all_instructions) {
m_address_profiler_ptr->printStats(out);
}
@@ -447,11 +433,6 @@ Profiler::clearStats()
m_ruby_start = g_system_ptr->curCycle();
m_real_time_start_time = time(NULL);
- m_cycles_executed_at_start.resize(m_num_of_sequencers);
- for (int i = 0; i < m_num_of_sequencers; i++) {
- m_cycles_executed_at_start[i] = g_system_ptr->curCycle();
- }
-
m_busyBankCount = 0;
m_missLatencyHistograms.resize(RubyRequestType_NUM);
@@ -544,12 +525,6 @@ Profiler::profileSharing(const Address& addr, AccessType type,
}
void
-Profiler::profilePFWait(Cycles waitTime)
-{
- m_prefetchWaitHistogram.add(waitTime);
-}
-
-void
Profiler::bankBusy()
{
m_busyBankCount++;
diff --git a/src/mem/ruby/profiler/Profiler.hh b/src/mem/ruby/profiler/Profiler.hh
index ce11f7a7b..23efed67a 100644
--- a/src/mem/ruby/profiler/Profiler.hh
+++ b/src/mem/ruby/profiler/Profiler.hh
@@ -108,12 +108,6 @@ class Profiler : public SimObject
m_average_latency_estimate.add(latency);
}
- void recordPrediction(bool wasGood, bool wasPredicted);
-
- void startTransaction(int cpu);
- void endTransaction(int cpu);
- void profilePFWait(Cycles waitTime);
-
void controllerBusy(MachineID machID);
void bankBusy();
@@ -156,17 +150,10 @@ class Profiler : public SimObject
AddressProfiler* m_address_profiler_ptr;
AddressProfiler* m_inst_profiler_ptr;
- std::vector<int64> m_instructions_executed_at_start;
- std::vector<int64> m_cycles_executed_at_start;
-
Cycles m_ruby_start;
time_t m_real_time_start_time;
int64_t m_busyBankCount;
- Histogram m_multicast_retry_histogram;
-
- Histogram m_filter_action_histogram;
- Histogram m_tbeProfile;
Histogram m_read_sharing_histogram;
Histogram m_write_sharing_histogram;
@@ -174,8 +161,6 @@ class Profiler : public SimObject
int64 m_cache_to_cache;
int64 m_memory_to_cache;
- Histogram m_prefetchWaitHistogram;
-
std::vector<Histogram> m_missLatencyHistograms;
std::vector<Histogram> m_machLatencyHistograms;
std::vector< std::vector<Histogram> > m_missMachLatencyHistograms;