diff options
author | Nilay Vaish <nilay@cs.wisc.edu> | 2015-08-14 19:28:43 -0500 |
---|---|---|
committer | Nilay Vaish <nilay@cs.wisc.edu> | 2015-08-14 19:28:43 -0500 |
commit | b815221718d246549311b2923a2da7a233e1f625 (patch) | |
tree | 3c121cd8b898644d8f4552dd862b9707efe580a9 /src/mem/ruby/slicc_interface/AbstractCacheEntry.hh | |
parent | a6f3f38f2c444dd3bc7c72296cbccdabbbff495a (diff) | |
download | gem5-b815221718d246549311b2923a2da7a233e1f625.tar.xz |
ruby: adds set and way indices to AbstractCacheEntry
Diffstat (limited to 'src/mem/ruby/slicc_interface/AbstractCacheEntry.hh')
-rw-r--r-- | src/mem/ruby/slicc_interface/AbstractCacheEntry.hh | 19 |
1 files changed, 16 insertions, 3 deletions
diff --git a/src/mem/ruby/slicc_interface/AbstractCacheEntry.hh b/src/mem/ruby/slicc_interface/AbstractCacheEntry.hh index 2b318957f..926556781 100644 --- a/src/mem/ruby/slicc_interface/AbstractCacheEntry.hh +++ b/src/mem/ruby/slicc_interface/AbstractCacheEntry.hh @@ -62,9 +62,22 @@ class AbstractCacheEntry : public AbstractEntry void clearLocked(); bool isLocked(int context) const; - Addr m_Address; // Address of this block, required by CacheMemory - int m_locked; // Holds info whether the address is locked, - // required for implementing LL/SC + void setSetIndex(uint32_t s) { m_set_index = s; } + uint32_t getSetIndex() const { return m_set_index; } + + void setWayIndex(uint32_t s) { m_way_index = s; } + uint32_t getWayIndex() const { return m_way_index; } + + // Address of this block, required by CacheMemory + Addr m_Address; + // Holds info whether the address is locked. + // Required for implementing LL/SC operations. + int m_locked; + + private: + // Set and way coordinates of the entry within the cache memory object. + uint32_t m_set_index; + uint32_t m_way_index; }; inline std::ostream& |