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authorNikos Nikoleris <nikos.nikoleris@arm.com>2017-03-13 18:19:08 +0000
committerNikos Nikoleris <nikos.nikoleris@arm.com>2017-06-13 15:52:32 +0000
commit12db50c89584938839e035da47d206250cbfd7c2 (patch)
tree831a4151b29cdc14958b8dab2cce97fc3136d7b6 /src/mem/ruby/slicc_interface/AbstractController.cc
parentdd3fc1f996679f4cfd29f980d43a0652542e6d9b (diff)
downloadgem5-12db50c89584938839e035da47d206250cbfd7c2.tar.xz
ruby: Add support for address ranges in the directory
Previously the directory covered a flat address range that always started from address 0. This change adds a vector of address ranges with interleaving and hashing that each directory keeps track of and the necessary flexibility to support systems with non continuous memory ranges. Change-Id: I6ea1c629bdf4c5137b7d9c89dbaf6c826adfd977 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/2903 Reviewed-by: Bradford Beckmann <brad.beckmann@amd.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Jason Lowe-Power <jason@lowepower.com>
Diffstat (limited to 'src/mem/ruby/slicc_interface/AbstractController.cc')
-rw-r--r--src/mem/ruby/slicc_interface/AbstractController.cc23
1 files changed, 22 insertions, 1 deletions
diff --git a/src/mem/ruby/slicc_interface/AbstractController.cc b/src/mem/ruby/slicc_interface/AbstractController.cc
index 19dca9028..0bc88eefa 100644
--- a/src/mem/ruby/slicc_interface/AbstractController.cc
+++ b/src/mem/ruby/slicc_interface/AbstractController.cc
@@ -1,4 +1,16 @@
/*
+ * Copyright (c) 2017 ARM Limited
+ * All rights reserved.
+ *
+ * The license below extends only to copyright in the software and shall
+ * not be construed as granting a license to any other intellectual
+ * property including but not limited to intellectual property relating
+ * to a hardware implementation of the functionality of the software
+ * licensed hereunder. You may use the software subject to the license
+ * terms below provided that you ensure that this notice is replicated
+ * unmodified and in its entirety in all distributions of the software,
+ * modified or unmodified, in source code or in binary form.
+ *
* Copyright (c) 2011-2014 Mark D. Hill and David A. Wood
* All rights reserved.
*
@@ -43,7 +55,8 @@ AbstractController::AbstractController(const Params *p)
m_number_of_TBEs(p->number_of_TBEs),
m_transitions_per_cycle(p->transitions_per_cycle),
m_buffer_size(p->buffer_size), m_recycle_latency(p->recycle_latency),
- memoryPort(csprintf("%s.memory", name()), this, "")
+ memoryPort(csprintf("%s.memory", name()), this, ""),
+ addrRanges(p->addr_ranges.begin(), p->addr_ranges.end())
{
if (m_version == 0) {
// Combine the statistics from all controllers
@@ -347,6 +360,14 @@ AbstractController::recvTimingResp(PacketPtr pkt)
delete pkt;
}
+MachineID
+AbstractController::mapAddressToMachine(Addr addr, MachineType mtype) const
+{
+ NodeID node = m_net_ptr->addressToNodeID(addr, mtype);
+ MachineID mach = {mtype, node};
+ return mach;
+}
+
bool
AbstractController::MemoryPort::recvTimingResp(PacketPtr pkt)
{