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authorNilay Vaish <nilay@cs.wisc.edu>2013-08-07 14:51:18 -0500
committerNilay Vaish <nilay@cs.wisc.edu>2013-08-07 14:51:18 -0500
commitf1b17bf1576bbc7c5786194cb9a02e3e52dbd1e6 (patch)
treed9ebf15d8fc8ce92efc88d7387749fbb538917e5 /src/mem/ruby/slicc_interface/AbstractController.cc
parente0387415988a11f30b5aac66cd5cc32f7387e08e (diff)
downloadgem5-f1b17bf1576bbc7c5786194cb9a02e3e52dbd1e6.tar.xz
ruby: slicc: move some code to AbstractController
Some of the code in StateMachine.py file is added to all the controllers and is independent of the controller definition. This code is being moved to the AbstractController class which is the parent class of all controllers.
Diffstat (limited to 'src/mem/ruby/slicc_interface/AbstractController.cc')
-rw-r--r--src/mem/ruby/slicc_interface/AbstractController.cc16
1 files changed, 16 insertions, 0 deletions
diff --git a/src/mem/ruby/slicc_interface/AbstractController.cc b/src/mem/ruby/slicc_interface/AbstractController.cc
index 930f3a70f..2e4109c01 100644
--- a/src/mem/ruby/slicc_interface/AbstractController.cc
+++ b/src/mem/ruby/slicc_interface/AbstractController.cc
@@ -182,3 +182,19 @@ AbstractController::wakeUpAllBuffers()
m_waiting_buffers.clear();
}
}
+
+void
+AbstractController::blockOnQueue(Address addr, MessageBuffer* port)
+{
+ m_is_blocking = true;
+ m_block_map[addr] = port;
+}
+
+void
+AbstractController::unblock(Address addr)
+{
+ m_block_map.erase(addr);
+ if (m_block_map.size() == 0) {
+ m_is_blocking = false;
+ }
+}