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authorNilay Vaish <nilay@cs.wisc.edu>2015-08-14 19:28:44 -0500
committerNilay Vaish <nilay@cs.wisc.edu>2015-08-14 19:28:44 -0500
commit3a726752c1d200325495a527893eceb13c1ce5c5 (patch)
tree9d6f88eeb8c59a01274d1b45fd14f0a879f490c0 /src/mem/ruby/slicc_interface/AbstractController.hh
parent3230a0b89f9952ecd0cf9dbe216ffb6b757dcace (diff)
downloadgem5-3a726752c1d200325495a527893eceb13c1ce5c5.tar.xz
ruby: abstract controller: mark some variables as const
Diffstat (limited to 'src/mem/ruby/slicc_interface/AbstractController.hh')
-rw-r--r--src/mem/ruby/slicc_interface/AbstractController.hh14
1 files changed, 7 insertions, 7 deletions
diff --git a/src/mem/ruby/slicc_interface/AbstractController.hh b/src/mem/ruby/slicc_interface/AbstractController.hh
index 94361034a..34160c149 100644
--- a/src/mem/ruby/slicc_interface/AbstractController.hh
+++ b/src/mem/ruby/slicc_interface/AbstractController.hh
@@ -139,14 +139,14 @@ class AbstractController : public MemObject, public Consumer
void wakeUpAllBuffers();
protected:
- NodeID m_version;
+ const NodeID m_version;
MachineID m_machineID;
- NodeID m_clusterID;
+ const NodeID m_clusterID;
// MasterID used by some components of gem5.
- MasterID m_masterId;
+ const MasterID m_masterId;
- Network* m_net_ptr;
+ Network *m_net_ptr;
bool m_is_blocking;
std::map<Addr, MessageBuffer*> m_block_map;
@@ -157,9 +157,9 @@ class AbstractController : public MemObject, public Consumer
unsigned int m_in_ports;
unsigned int m_cur_in_port;
- int m_number_of_TBEs;
- int m_transitions_per_cycle;
- unsigned int m_buffer_size;
+ const int m_number_of_TBEs;
+ const int m_transitions_per_cycle;
+ const unsigned int m_buffer_size;
Cycles m_recycle_latency;
//! Counter for the number of cycles when the transitions carried out