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author | Nilay Vaish <nilay@cs.wisc.edu> | 2013-02-10 21:43:17 -0600 |
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committer | Nilay Vaish <nilay@cs.wisc.edu> | 2013-02-10 21:43:17 -0600 |
commit | cb7782f78d337527d8ea3d593645fc67cca54d23 (patch) | |
tree | ac0602477455b2364a32f788b0e1e6bae1fa999b /src/mem/ruby/slicc_interface/Message.hh | |
parent | 253e8edf13c4d7bee6bd13f84fdfa6cf40a0c5c3 (diff) | |
download | gem5-cb7782f78d337527d8ea3d593645fc67cca54d23.tar.xz |
ruby: enable multiple clock domains
This patch allows ruby to have multiple clock domains. As I understand
with this patch, controllers can have different frequencies. The entire
network needs to run at a single frequency.
The idea is that with in an object, time is treated in terms of cycles.
But the messages that are passed from one entity to another should contain
the time in Ticks. As of now, this is only true for the message buffers,
but not for the links in the network. As I understand the code, all the
entities in different networks (simple, garnet-fixed, garnet-flexible) should
be clocked at the same frequency.
Another problem is that the directory controller has to operate at the same
frequency as the ruby system. This is because the memory controller does
not make use of the Message Buffer, and instead implements a buffer of its
own. So, it has no idea of the frequency at which the directory controller
is operating and uses ruby system's frequency for scheduling events.
Diffstat (limited to 'src/mem/ruby/slicc_interface/Message.hh')
-rw-r--r-- | src/mem/ruby/slicc_interface/Message.hh | 24 |
1 files changed, 12 insertions, 12 deletions
diff --git a/src/mem/ruby/slicc_interface/Message.hh b/src/mem/ruby/slicc_interface/Message.hh index c99d66f5c..e78ad9a76 100644 --- a/src/mem/ruby/slicc_interface/Message.hh +++ b/src/mem/ruby/slicc_interface/Message.hh @@ -40,16 +40,16 @@ typedef RefCountingPtr<Message> MsgPtr; class Message : public RefCounted { public: - Message(Cycles curTime) + Message(Tick curTime) : m_time(curTime), m_LastEnqueueTime(curTime), - m_DelayedCycles(0) + m_DelayedTicks(0) { } Message(const Message &other) : m_time(other.m_time), m_LastEnqueueTime(other.m_LastEnqueueTime), - m_DelayedCycles(other.m_DelayedCycles) + m_DelayedTicks(other.m_DelayedTicks) { } virtual ~Message() { } @@ -71,19 +71,19 @@ class Message : public RefCounted virtual bool functionalWrite(Packet *pkt) = 0; //{ fatal("Write functional access not implemented!"); } - void setDelayedCycles(const Cycles cycles) { m_DelayedCycles = cycles; } - const Cycles getDelayedCycles() const {return m_DelayedCycles;} + void setDelayedTicks(const Tick ticks) { m_DelayedTicks = ticks; } + const Tick getDelayedTicks() const {return m_DelayedTicks;} - void setLastEnqueueTime(const Cycles& time) { m_LastEnqueueTime = time; } - const Cycles getLastEnqueueTime() const {return m_LastEnqueueTime;} + void setLastEnqueueTime(const Tick& time) { m_LastEnqueueTime = time; } + const Tick getLastEnqueueTime() const {return m_LastEnqueueTime;} - const Cycles& getTime() const { return m_time; } - void setTime(const Cycles& new_time) { m_time = new_time; } + const Tick& getTime() const { return m_time; } + void setTime(const Tick& new_time) { m_time = new_time; } private: - Cycles m_time; - Cycles m_LastEnqueueTime; // my last enqueue time - Cycles m_DelayedCycles; // my delayed cycles + Tick m_time; + Tick m_LastEnqueueTime; // my last enqueue time + Tick m_DelayedTicks; // my delayed cycles }; inline std::ostream& |