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author | Nilay Vaish <nilay@cs.wisc.edu> | 2012-10-15 17:51:57 -0500 |
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committer | Nilay Vaish <nilay@cs.wisc.edu> | 2012-10-15 17:51:57 -0500 |
commit | 5ffc16593997b35f4f1abbd149e01169e6bbcff5 (patch) | |
tree | 647411a3d027f2bdfaf750f65107affb6d9c002d /src/mem/ruby/slicc_interface/RubyRequest.cc | |
parent | 07ce90f7aa28a507493da905ba1881972250bb3a (diff) | |
download | gem5-5ffc16593997b35f4f1abbd149e01169e6bbcff5.tar.xz |
ruby: improved support for functional accesses
This patch adds support to different entities in the ruby memory system
for more reliable functional read/write accesses. Only the simple network
has been augmented as of now. Later on Garnet will also support functional
accesses.
The patch adds functional access code to all the different types of messages
that protocols can send around. These messages are functionally accessed
by going through the buffers maintained by the network entities.
The patch also rectifies some of the bugs found in coherence protocols while
testing the patch.
With this patch applied, functional writes always succeed. But functional
reads can still fail.
Diffstat (limited to 'src/mem/ruby/slicc_interface/RubyRequest.cc')
-rw-r--r-- | src/mem/ruby/slicc_interface/RubyRequest.cc | 37 |
1 files changed, 37 insertions, 0 deletions
diff --git a/src/mem/ruby/slicc_interface/RubyRequest.cc b/src/mem/ruby/slicc_interface/RubyRequest.cc index 2aae61d7b..7ff2b75d8 100644 --- a/src/mem/ruby/slicc_interface/RubyRequest.cc +++ b/src/mem/ruby/slicc_interface/RubyRequest.cc @@ -18,3 +18,40 @@ RubyRequest::print(ostream& out) const // out << "Time = " << getTime() << " "; out << "]"; } + +bool +RubyRequest::functionalRead(Packet *pkt) +{ + // This needs a little explanation. Initially I thought that this + // message should be read. But the way the memtester works for now, + // we should not be reading this message as memtester updates the + // functional memory only after a write has actually taken place. + return false; +} + +bool +RubyRequest::functionalWrite(Packet *pkt) +{ + // This needs a little explanation. I am not sure if this message + // should be written. Essentially the question is how are writes + // ordered. I am assuming that if a functional write is issued after + // a timing write to the same address, then the functional write + // has to overwrite the data for the timing request, even if the + // timing request has still not been ordered globally. + + Address pktLineAddr(pkt->getAddr()); + pktLineAddr.makeLineAddress(); + + if (pktLineAddr == m_LineAddress) { + uint8_t *pktData = pkt->getPtr<uint8_t>(true); + unsigned int size_in_bytes = pkt->getSize(); + unsigned startByte = pkt->getAddr() - m_LineAddress.getAddress(); + + for (unsigned i = 0; i < size_in_bytes; ++i) { + data[i + startByte] = pktData[i]; + } + + return true; + } + return false; +} |