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author | Brad Beckmann <Brad.Beckmann@amd.com> | 2009-11-18 16:34:31 -0800 |
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committer | Brad Beckmann <Brad.Beckmann@amd.com> | 2009-11-18 16:34:31 -0800 |
commit | 2783a7b9ad90d04d74418d7463c255c29ffd8046 (patch) | |
tree | 8ec014b0f6607795faa96b980f8ec1947352bd78 /src/mem/ruby/slicc_interface/RubySlicc_ComponentMapping.hh | |
parent | 7b8fcecf11813492d770a0d766fb9a9fb01be3e2 (diff) | |
download | gem5-2783a7b9ad90d04d74418d7463c255c29ffd8046.tar.xz |
ruby: returns the number of LLC needed for broadcast
Added feature to CacheMemory to return the number of last level caches.
This count is need for broadcast protocols such as MOESI_hammer.
Diffstat (limited to 'src/mem/ruby/slicc_interface/RubySlicc_ComponentMapping.hh')
-rw-r--r-- | src/mem/ruby/slicc_interface/RubySlicc_ComponentMapping.hh | 11 |
1 files changed, 10 insertions, 1 deletions
diff --git a/src/mem/ruby/slicc_interface/RubySlicc_ComponentMapping.hh b/src/mem/ruby/slicc_interface/RubySlicc_ComponentMapping.hh index 96405c8dd..222ff86f8 100644 --- a/src/mem/ruby/slicc_interface/RubySlicc_ComponentMapping.hh +++ b/src/mem/ruby/slicc_interface/RubySlicc_ComponentMapping.hh @@ -61,6 +61,15 @@ #define MACHINETYPE_L3CACHE_ENUM MachineType_NUM #endif +#ifdef MACHINETYPE_DMA +#define MACHINETYPE_DMA_ENUM MachineType_DMA +#else +#define MACHINETYPE_DMA_ENUM MachineType_NUM +#endif + +// used to determine the number of acks to wait for +int getNumberOfLastLevelCaches(); + // used to determine the home directory // returns a value between 0 and total_directories_within_the_system inline @@ -81,7 +90,7 @@ MachineID map_Address_to_Directory(const Address &addr) inline MachineID map_Address_to_DMA(const Address & addr) { - MachineID dma = {MachineType_DMA, 0}; + MachineID dma = {MACHINETYPE_DMA_ENUM, 0}; return dma; } |