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authorNilay Vaish <nilay@cs.wisc.edu>2012-10-15 17:51:57 -0500
committerNilay Vaish <nilay@cs.wisc.edu>2012-10-15 17:51:57 -0500
commit5ffc16593997b35f4f1abbd149e01169e6bbcff5 (patch)
tree647411a3d027f2bdfaf750f65107affb6d9c002d /src/mem/ruby/slicc_interface/RubySlicc_Util.hh
parent07ce90f7aa28a507493da905ba1881972250bb3a (diff)
downloadgem5-5ffc16593997b35f4f1abbd149e01169e6bbcff5.tar.xz
ruby: improved support for functional accesses
This patch adds support to different entities in the ruby memory system for more reliable functional read/write accesses. Only the simple network has been augmented as of now. Later on Garnet will also support functional accesses. The patch adds functional access code to all the different types of messages that protocols can send around. These messages are functionally accessed by going through the buffers maintained by the network entities. The patch also rectifies some of the bugs found in coherence protocols while testing the patch. With this patch applied, functional writes always succeed. But functional reads can still fail.
Diffstat (limited to 'src/mem/ruby/slicc_interface/RubySlicc_Util.hh')
-rw-r--r--src/mem/ruby/slicc_interface/RubySlicc_Util.hh57
1 files changed, 57 insertions, 0 deletions
diff --git a/src/mem/ruby/slicc_interface/RubySlicc_Util.hh b/src/mem/ruby/slicc_interface/RubySlicc_Util.hh
index 06372c9fc..06c540db5 100644
--- a/src/mem/ruby/slicc_interface/RubySlicc_Util.hh
+++ b/src/mem/ruby/slicc_interface/RubySlicc_Util.hh
@@ -35,6 +35,7 @@
#include <cassert>
+#include "debug/RubySlicc.hh"
#include "mem/ruby/common/Address.hh"
#include "mem/ruby/common/Global.hh"
#include "mem/ruby/slicc_interface/RubySlicc_ComponentMapping.hh"
@@ -129,4 +130,60 @@ mod(int val, int mod)
return val % mod;
}
+/**
+ * This function accepts an address, a data block and a packet. If the address
+ * range for the data block contains the address which the packet needs to
+ * read, then the data from the data block is written to the packet. True is
+ * returned if the data block was read, otherwise false is returned.
+ */
+inline bool
+testAndRead(Address addr, DataBlock& blk, Packet *pkt)
+{
+ Address pktLineAddr(pkt->getAddr());
+ pktLineAddr.makeLineAddress();
+
+ Address lineAddr = addr;
+ lineAddr.makeLineAddress();
+
+ if (pktLineAddr == lineAddr) {
+ uint8_t *data = pkt->getPtr<uint8_t>(true);
+ unsigned int size_in_bytes = pkt->getSize();
+ unsigned startByte = pkt->getAddr() - lineAddr.getAddress();
+
+ for (unsigned i = 0; i < size_in_bytes; ++i) {
+ data[i] = blk.getByte(i + startByte);
+ }
+ return true;
+ }
+ return false;
+}
+
+/**
+ * This function accepts an address, a data block and a packet. If the address
+ * range for the data block contains the address which the packet needs to
+ * write, then the data from the packet is written to the data block. True is
+ * returned if the data block was written, otherwise false is returned.
+ */
+inline bool
+testAndWrite(Address addr, DataBlock& blk, Packet *pkt)
+{
+ Address pktLineAddr(pkt->getAddr());
+ pktLineAddr.makeLineAddress();
+
+ Address lineAddr = addr;
+ lineAddr.makeLineAddress();
+
+ if (pktLineAddr == lineAddr) {
+ uint8_t *data = pkt->getPtr<uint8_t>(true);
+ unsigned int size_in_bytes = pkt->getSize();
+ unsigned startByte = pkt->getAddr() - lineAddr.getAddress();
+
+ for (unsigned i = 0; i < size_in_bytes; ++i) {
+ blk.setByte(i + startByte, data[i]);
+ }
+ return true;
+ }
+ return false;
+}
+
#endif // __MEM_RUBY_SLICC_INTERFACE_RUBYSLICCUTIL_HH__