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authorGiacomo Travaglini <giacomo.travaglini@arm.com>2018-04-04 16:27:04 +0100
committerGiacomo Travaglini <giacomo.travaglini@arm.com>2018-04-27 16:00:28 +0000
commit5187a24d496cd16bfe440f52ff0c45ab0e185306 (patch)
treec491ebdad23a5f9e57ef62ffeabcf2b87289f5ce /src/mem/ruby/slicc_interface
parent685cf2d1f8ae2f2ca3168a650efa1d36120783fe (diff)
downloadgem5-5187a24d496cd16bfe440f52ff0c45ab0e185306.tar.xz
sim,cpu,mem,arch: Introduced MasterInfo data structure
With this patch a gem5 System will store more info about its Masters. While it was previously keeping track of the Master name and Master ID only, it is now adding a per-Master pointer to the SimObject related to the Master. This will make it possible for a client to query a System for a Master using either the master's name or the master's pointer. Change-Id: I8b97d328a65cd06f329e2cdd3679451c17d2b8f6 Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/9781 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
Diffstat (limited to 'src/mem/ruby/slicc_interface')
-rw-r--r--src/mem/ruby/slicc_interface/AbstractController.cc2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mem/ruby/slicc_interface/AbstractController.cc b/src/mem/ruby/slicc_interface/AbstractController.cc
index b920ff7b0..de5e81057 100644
--- a/src/mem/ruby/slicc_interface/AbstractController.cc
+++ b/src/mem/ruby/slicc_interface/AbstractController.cc
@@ -51,7 +51,7 @@
AbstractController::AbstractController(const Params *p)
: MemObject(p), Consumer(this), m_version(p->version),
m_clusterID(p->cluster_id),
- m_masterId(p->system->getMasterId(name())), m_is_blocking(false),
+ m_masterId(p->system->getMasterId(this)), m_is_blocking(false),
m_number_of_TBEs(p->number_of_TBEs),
m_transitions_per_cycle(p->transitions_per_cycle),
m_buffer_size(p->buffer_size), m_recycle_latency(p->recycle_latency),