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| author | David Guillen Fandos <david.guillen@arm.com> | 2016-06-06 17:16:43 +0100 |
|---|---|---|
| committer | David Guillen Fandos <david.guillen@arm.com> | 2016-06-06 17:16:43 +0100 |
| commit | 70798b1ba0a5b9a7242b48bf9598957476f8168b (patch) | |
| tree | 5cdcb4e59a49483ac44eeda3af557fc573038034 /src/mem/ruby/slicc_interface | |
| parent | 589033c94c0381fe4e67cebe08352b6e1fbcde2e (diff) | |
| download | gem5-70798b1ba0a5b9a7242b48bf9598957476f8168b.tar.xz | |
stats: Fixing regStats function for some SimObjects
Fixing an issue with regStats not calling the parent class method
for most SimObjects in Gem5. This causes issues if one adds new
stats in the base class (since they are never initialized properly!).
Change-Id: Iebc5aa66f58816ef4295dc8e48a357558d76a77c
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Diffstat (limited to 'src/mem/ruby/slicc_interface')
| -rw-r--r-- | src/mem/ruby/slicc_interface/AbstractController.cc | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/mem/ruby/slicc_interface/AbstractController.cc b/src/mem/ruby/slicc_interface/AbstractController.cc index 5d8b6eeea..b4576f87e 100644 --- a/src/mem/ruby/slicc_interface/AbstractController.cc +++ b/src/mem/ruby/slicc_interface/AbstractController.cc @@ -76,6 +76,8 @@ AbstractController::resetStats() void AbstractController::regStats() { + MemObject::regStats(); + m_fully_busy_cycles .name(name() + ".fully_busy_cycles") .desc("cycles for which number of transistions == max transitions") |