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authorNilay Vaish <nilay@cs.wisc.edu>2013-01-14 10:04:21 -0600
committerNilay Vaish <nilay@cs.wisc.edu>2013-01-14 10:04:21 -0600
commitcf232de4615f0fe9435d6e92a1d6319c972a8c88 (patch)
tree539c365baf0b078b2fdbf820feeb89c1afee8726 /src/mem/ruby/slicc_interface
parentcbbc4c7f6b4cb718cc3907b955f7ae527d2d0274 (diff)
downloadgem5-cf232de4615f0fe9435d6e92a1d6319c972a8c88.tar.xz
Ruby: use ClockedObject in Consumer class
Many Ruby structures inherit from the Consumer, which is used for scheduling events. The Consumer used to relay on an Event Manager for scheduling events and on g_system_ptr for time. With this patch, the Consumer will now use a ClockedObject to schedule events and to query for current time. This resulted in several structures being converted from SimObjects to ClockedObjects. Also, the MessageBuffer class now requires a pointer to a ClockedObject so as to query for time.
Diffstat (limited to 'src/mem/ruby/slicc_interface')
-rw-r--r--src/mem/ruby/slicc_interface/AbstractController.cc2
-rw-r--r--src/mem/ruby/slicc_interface/AbstractController.hh4
-rw-r--r--src/mem/ruby/slicc_interface/Controller.py4
-rw-r--r--src/mem/ruby/slicc_interface/Message.hh9
-rw-r--r--src/mem/ruby/slicc_interface/RubySlicc_Profiler_interface.cc5
-rw-r--r--src/mem/ruby/slicc_interface/RubySlicc_Profiler_interface.hh2
6 files changed, 11 insertions, 15 deletions
diff --git a/src/mem/ruby/slicc_interface/AbstractController.cc b/src/mem/ruby/slicc_interface/AbstractController.cc
index ac48db0c7..359512afc 100644
--- a/src/mem/ruby/slicc_interface/AbstractController.cc
+++ b/src/mem/ruby/slicc_interface/AbstractController.cc
@@ -30,7 +30,7 @@
#include "mem/ruby/system/System.hh"
AbstractController::AbstractController(const Params *p)
- : SimObject(p), Consumer(this)
+ : ClockedObject(p), Consumer(this)
{
m_version = p->version;
m_transitions_per_cycle = p->transitions_per_cycle;
diff --git a/src/mem/ruby/slicc_interface/AbstractController.hh b/src/mem/ruby/slicc_interface/AbstractController.hh
index 16b881b1f..40356cac5 100644
--- a/src/mem/ruby/slicc_interface/AbstractController.hh
+++ b/src/mem/ruby/slicc_interface/AbstractController.hh
@@ -41,12 +41,12 @@
#include "mem/ruby/system/MachineID.hh"
#include "mem/packet.hh"
#include "params/RubyController.hh"
-#include "sim/sim_object.hh"
+#include "sim/clocked_object.hh"
class MessageBuffer;
class Network;
-class AbstractController : public SimObject, public Consumer
+class AbstractController : public ClockedObject, public Consumer
{
public:
typedef RubyControllerParams Params;
diff --git a/src/mem/ruby/slicc_interface/Controller.py b/src/mem/ruby/slicc_interface/Controller.py
index 9787b5ce7..aa8f35145 100644
--- a/src/mem/ruby/slicc_interface/Controller.py
+++ b/src/mem/ruby/slicc_interface/Controller.py
@@ -28,9 +28,9 @@
# Brad Beckmann
from m5.params import *
-from m5.SimObject import SimObject
+from ClockedObject import ClockedObject
-class RubyController(SimObject):
+class RubyController(ClockedObject):
type = 'RubyController'
cxx_class = 'AbstractController'
cxx_header = "mem/ruby/slicc_interface/AbstractController.hh"
diff --git a/src/mem/ruby/slicc_interface/Message.hh b/src/mem/ruby/slicc_interface/Message.hh
index 7b94a01e2..201ec4b60 100644
--- a/src/mem/ruby/slicc_interface/Message.hh
+++ b/src/mem/ruby/slicc_interface/Message.hh
@@ -73,12 +73,11 @@ class Message : public RefCounted
virtual bool functionalWrite(Packet *pkt) = 0;
//{ fatal("Write functional access not implemented!"); }
- void setDelayedCycles(const int& cycles) { m_DelayedCycles = cycles; }
- const int& getDelayedCycles() const {return m_DelayedCycles;}
- int& getDelayedCycles() {return m_DelayedCycles;}
+ void setDelayedCycles(const Time cycles) { m_DelayedCycles = cycles; }
+ const Time getDelayedCycles() const {return m_DelayedCycles;}
+
void setLastEnqueueTime(const Time& time) { m_LastEnqueueTime = time; }
- const Time& getLastEnqueueTime() const {return m_LastEnqueueTime;}
- Time& getLastEnqueueTime() {return m_LastEnqueueTime;}
+ const Time getLastEnqueueTime() const {return m_LastEnqueueTime;}
const Time& getTime() const { return m_time; }
void setTime(const Time& new_time) { m_time = new_time; }
diff --git a/src/mem/ruby/slicc_interface/RubySlicc_Profiler_interface.cc b/src/mem/ruby/slicc_interface/RubySlicc_Profiler_interface.cc
index 508c27794..2dd8671a1 100644
--- a/src/mem/ruby/slicc_interface/RubySlicc_Profiler_interface.cc
+++ b/src/mem/ruby/slicc_interface/RubySlicc_Profiler_interface.cc
@@ -66,7 +66,7 @@ profile_sharing(const Address& addr, AccessType type, NodeID requestor,
}
void
-profileMsgDelay(int virtualNetwork, int delayCycles)
+profileMsgDelay(uint32_t virtualNetwork, Time delayCycles)
{
g_system_ptr->getProfiler()->profileMsgDelay(virtualNetwork, delayCycles);
}
@@ -86,6 +86,3 @@ profileGetS(const Address& datablock, const Address& PC, const Set& owner,
g_system_ptr->getProfiler()->getAddressProfiler()->
profileGetS(datablock, PC, owner, sharers, requestor);
}
-
-
-
diff --git a/src/mem/ruby/slicc_interface/RubySlicc_Profiler_interface.hh b/src/mem/ruby/slicc_interface/RubySlicc_Profiler_interface.hh
index 596b00fbe..799671435 100644
--- a/src/mem/ruby/slicc_interface/RubySlicc_Profiler_interface.hh
+++ b/src/mem/ruby/slicc_interface/RubySlicc_Profiler_interface.hh
@@ -55,7 +55,7 @@ void profile_token_retry(const Address& addr, AccessType type, int count);
void profile_filter_action(int action);
void profile_persistent_prediction(const Address& addr, AccessType type);
void profile_average_latency_estimate(int latency);
-void profileMsgDelay(int virtualNetwork, int delayCycles);
+void profileMsgDelay(uint32_t virtualNetwork, Time delayCycles);
void profile_multicast_retry(const Address& addr, int count);
void profileGetX(const Address& datablock, const Address& PC, const Set& owner,