ruby: Convert most Ruby objects to M5 SimObjects.

The necessary companion conversion of Ruby objects generated by SLICC
are converted to M5 SimObjects in the following patch, so this patch
alone does not compile.
Conversion of Garnet network models is also handled in a separate
patch; that code is temporarily disabled from compiling to allow
testing of interim code.

3 files changed, 21 insertions, 2 deletions

diff --git a/src/mem/ruby/slicc_interface/AbstractController.hh b/src/mem/ruby/slicc_interface/AbstractController.hh
index c7062262a..28c8a103a 100644
--- a/src/mem/ruby/slicc_interface/AbstractController.hh
+++ b/src/mem/ruby/slicc_interface/AbstractController.hh
@@ -2,6 +2,9 @@
 #ifndef ABSTRACTCONTROLLER_H
 #define ABSTRACTCONTROLLER_H
 
+#include "sim/sim_object.hh"
+#include "params/RubyController.hh"
+
 #include "mem/ruby/common/Consumer.hh"
 #include "mem/protocol/MachineType.hh"
 #include "mem/ruby/common/Address.hh"
@@ -9,9 +12,10 @@
 class MessageBuffer;
 class Network;
 
-class AbstractController : public Consumer {
+class AbstractController : public SimObject, public Consumer {
 public:
-  AbstractController() {}
+    typedef RubyControllerParams Params;
+    AbstractController(const Params *p) : SimObject(p) {}
   virtual void init(Network* net_ptr, const vector<string> & argv) = 0;
 
   // returns the number of controllers created of the specific subtype
diff --git a/src/mem/ruby/slicc_interface/Controller.py b/src/mem/ruby/slicc_interface/Controller.py
new file mode 100644
index 000000000..c23dc7849
--- /dev/null
+++ b/src/mem/ruby/slicc_interface/Controller.py
@@ -0,0 +1,13 @@
+from m5.params import *
+from m5.SimObject import SimObject
+
+class RubyController(SimObject):
+    type = 'RubyController'
+    cxx_class = 'AbstractController'
+    abstract = True
+    version = Param.Int("")
+    transitions_per_cycle = \
+        Param.Int(32, "no. of  SLICC state machine transitions per cycle")
+    buffer_size = Param.Int(0, "max buffer size 0 means infinite")
+    recycle_latency = Param.Int(10, "")
+    number_of_TBEs = Param.Int(256, "")
diff --git a/src/mem/ruby/slicc_interface/SConscript b/src/mem/ruby/slicc_interface/SConscript
index 6ba614fa9..98f4b4fa2 100644
--- a/src/mem/ruby/slicc_interface/SConscript
+++ b/src/mem/ruby/slicc_interface/SConscript
@@ -33,6 +33,8 @@ Import('*')
 if not env['RUBY']:
     Return()
 
+SimObject('Controller.py')
+
 Source('AbstractCacheEntry.cc')
 Source('RubySlicc_Profiler_interface.cc')
 Source('RubySlicc_ComponentMapping.cc')