summaryrefslogtreecommitdiff
path: root/src/mem/ruby/structures/BankedArray.hh
diff options
context:
space:
mode:
authorNilay Vaish <nilay@cs.wisc.edu>2015-08-14 19:28:43 -0500
committerNilay Vaish <nilay@cs.wisc.edu>2015-08-14 19:28:43 -0500
commita6f3f38f2c444dd3bc7c72296cbccdabbbff495a (patch)
tree04aada63bf055d0cf9b03ac527d080ea2b45d781 /src/mem/ruby/structures/BankedArray.hh
parent9648c05db19292ddd285a80914593cc0631403ff (diff)
downloadgem5-a6f3f38f2c444dd3bc7c72296cbccdabbbff495a.tar.xz
ruby: eliminate type uint64 and int64
These types are being replaced with uint64_t and int64_t.
Diffstat (limited to 'src/mem/ruby/structures/BankedArray.hh')
-rw-r--r--src/mem/ruby/structures/BankedArray.hh8
1 files changed, 4 insertions, 4 deletions
diff --git a/src/mem/ruby/structures/BankedArray.hh b/src/mem/ruby/structures/BankedArray.hh
index 438186944..179676f19 100644
--- a/src/mem/ruby/structures/BankedArray.hh
+++ b/src/mem/ruby/structures/BankedArray.hh
@@ -51,7 +51,7 @@ class BankedArray
{
public:
AccessRecord() : idx(0), startAccess(0), endAccess(0) {}
- int64 idx;
+ int64_t idx;
Tick startAccess;
Tick endAccess;
};
@@ -60,7 +60,7 @@ class BankedArray
// otherwise, schedule the event and wait for it to complete
std::vector<AccessRecord> busyBanks;
- unsigned int mapIndexToBank(int64 idx);
+ unsigned int mapIndexToBank(int64_t idx);
public:
BankedArray(unsigned int banks, Cycles accessLatency,
@@ -68,9 +68,9 @@ class BankedArray
// Note: We try the access based on the cache index, not the address
// This is so we don't get aliasing on blocks being replaced
- bool tryAccess(int64 idx);
+ bool tryAccess(int64_t idx);
- void reserve(int64 idx);
+ void reserve(int64_t idx);
Cycles getLatency() const { return accessLatency; }
};