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author | Iru Cai <mytbk920423@gmail.com> | 2019-02-28 17:07:16 +0800 |
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committer | Iru Cai <mytbk920423@gmail.com> | 2019-03-11 13:34:03 +0800 |
commit | 156b2eaa59f063e53e3fa9ea82632821f999352e (patch) | |
tree | 8fba561f7e4402271bd86afe6e0d21276bbf022e /src/mem/ruby/structures/CacheMemory.cc | |
parent | f1b7d0afe93497ef55e857cdd7ae9e168970bd65 (diff) | |
download | gem5-156b2eaa59f063e53e3fa9ea82632821f999352e.tar.xz |
invisispec-1.0 source
Diffstat (limited to 'src/mem/ruby/structures/CacheMemory.cc')
-rw-r--r-- | src/mem/ruby/structures/CacheMemory.cc | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/src/mem/ruby/structures/CacheMemory.cc b/src/mem/ruby/structures/CacheMemory.cc index 8d99c90aa..dc5898bea 100644 --- a/src/mem/ruby/structures/CacheMemory.cc +++ b/src/mem/ruby/structures/CacheMemory.cc @@ -176,7 +176,9 @@ CacheMemory::tryCacheAccess(Addr address, RubyRequestType type, return true; } if ((entry->m_Permission == AccessPermission_Read_Only) && - (type == RubyRequestType_LD || type == RubyRequestType_IFETCH)) { + (type == RubyRequestType_LD || + type == RubyRequestType_IFETCH || + type == RubyRequestType_SPEC_LD)) { return true; } // The line must not be accessible |