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author | Iru Cai <mytbk920423@gmail.com> | 2019-02-28 17:07:16 +0800 |
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committer | Iru Cai <mytbk920423@gmail.com> | 2019-03-20 14:32:29 +0800 |
commit | a17658beaacabe018be78c32aafe8415cdb16df0 (patch) | |
tree | 0432a6af261efd0ef03c318a67cf880a7461cc5d /src/mem/ruby/structures/CacheMemory.cc | |
parent | 59505f7305cc3f3b7637233fd2d231bd7f561e80 (diff) | |
download | gem5-a17658beaacabe018be78c32aafe8415cdb16df0.tar.xz |
invisispec-1.0 source
Diffstat (limited to 'src/mem/ruby/structures/CacheMemory.cc')
-rw-r--r-- | src/mem/ruby/structures/CacheMemory.cc | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/src/mem/ruby/structures/CacheMemory.cc b/src/mem/ruby/structures/CacheMemory.cc index 8d99c90aa..dc5898bea 100644 --- a/src/mem/ruby/structures/CacheMemory.cc +++ b/src/mem/ruby/structures/CacheMemory.cc @@ -176,7 +176,9 @@ CacheMemory::tryCacheAccess(Addr address, RubyRequestType type, return true; } if ((entry->m_Permission == AccessPermission_Read_Only) && - (type == RubyRequestType_LD || type == RubyRequestType_IFETCH)) { + (type == RubyRequestType_LD || + type == RubyRequestType_IFETCH || + type == RubyRequestType_SPEC_LD)) { return true; } // The line must not be accessible |