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author | Iru Cai <mytbk920423@gmail.com> | 2019-02-28 17:07:16 +0800 |
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committer | Iru Cai <mytbk920423@gmail.com> | 2019-03-20 21:51:26 +0800 |
commit | 592d2c8bb63714be979ccc0286607c63b444d139 (patch) | |
tree | 06a9bbef8c336b7a52964adaf050645f826d2bc8 /src/mem/ruby/structures/CacheMemory.cc | |
parent | 866b200c202dded37fdd857a1a42ec149bd109c9 (diff) | |
download | gem5-592d2c8bb63714be979ccc0286607c63b444d139.tar.xz |
invisispec-1.0 source
Diffstat (limited to 'src/mem/ruby/structures/CacheMemory.cc')
-rw-r--r-- | src/mem/ruby/structures/CacheMemory.cc | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/src/mem/ruby/structures/CacheMemory.cc b/src/mem/ruby/structures/CacheMemory.cc index 6c93c3260..943ccdf26 100644 --- a/src/mem/ruby/structures/CacheMemory.cc +++ b/src/mem/ruby/structures/CacheMemory.cc @@ -177,7 +177,9 @@ CacheMemory::tryCacheAccess(Addr address, RubyRequestType type, return true; } if ((entry->m_Permission == AccessPermission_Read_Only) && - (type == RubyRequestType_LD || type == RubyRequestType_IFETCH)) { + (type == RubyRequestType_LD || + type == RubyRequestType_IFETCH || + type == RubyRequestType_SPEC_LD)) { return true; } // The line must not be accessible |