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authorNilay Vaish <nilay@cs.wisc.edu>2015-08-19 10:02:01 -0500
committerNilay Vaish <nilay@cs.wisc.edu>2015-08-19 10:02:01 -0500
commit2f44dada688ace9c24f085a8422b3054c3edb72e (patch)
tree372bb043430552b0f4424eaa5571933883fcaaae /src/mem/ruby/structures/RubyMemoryControl.cc
parent2d9f3f8582e2de60850852c803a8c8ba0d6b91b5 (diff)
downloadgem5-2f44dada688ace9c24f085a8422b3054c3edb72e.tar.xz
ruby: reverts to changeset: bf82f1f7b040
Diffstat (limited to 'src/mem/ruby/structures/RubyMemoryControl.cc')
-rw-r--r--src/mem/ruby/structures/RubyMemoryControl.cc6
1 files changed, 3 insertions, 3 deletions
diff --git a/src/mem/ruby/structures/RubyMemoryControl.cc b/src/mem/ruby/structures/RubyMemoryControl.cc
index 413850627..0521aac06 100644
--- a/src/mem/ruby/structures/RubyMemoryControl.cc
+++ b/src/mem/ruby/structures/RubyMemoryControl.cc
@@ -176,7 +176,7 @@ void
RubyMemoryControl::init()
{
m_msg_counter = 0;
- assert(m_tFaw <= 62); // must fit in a uint64_t shift register
+ assert(m_tFaw <= 62); // must fit in a uint64 shift register
m_total_banks = m_banks_per_rank * m_ranks_per_dimm * m_dimms_per_channel;
m_total_ranks = m_ranks_per_dimm * m_dimms_per_channel;
@@ -213,7 +213,7 @@ RubyMemoryControl::init()
// m_tfaw_count keeps track of how many 1 bits are set
// in each shift register. When m_tfaw_count is >= 4,
// new activates are not allowed.
- m_tfaw_shift = new uint64_t[m_total_ranks];
+ m_tfaw_shift = new uint64[m_total_ranks];
m_tfaw_count = new int[m_total_ranks];
for (int i = 0; i < m_total_ranks; i++) {
m_tfaw_shift[i] = 0;
@@ -236,7 +236,7 @@ RubyMemoryControl::reset()
{
m_msg_counter = 0;
- assert(m_tFaw <= 62); // must fit in a uint64_t shift register
+ assert(m_tFaw <= 62); // must fit in a uint64 shift register
m_total_banks = m_banks_per_rank * m_ranks_per_dimm * m_dimms_per_channel;
m_total_ranks = m_ranks_per_dimm * m_dimms_per_channel;