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authorNilay Vaish <nilay@cs.wisc.edu>2015-08-14 19:28:43 -0500
committerNilay Vaish <nilay@cs.wisc.edu>2015-08-14 19:28:43 -0500
commita6f3f38f2c444dd3bc7c72296cbccdabbbff495a (patch)
tree04aada63bf055d0cf9b03ac527d080ea2b45d781 /src/mem/ruby/structures/RubyMemoryControl.cc
parent9648c05db19292ddd285a80914593cc0631403ff (diff)
downloadgem5-a6f3f38f2c444dd3bc7c72296cbccdabbbff495a.tar.xz
ruby: eliminate type uint64 and int64
These types are being replaced with uint64_t and int64_t.
Diffstat (limited to 'src/mem/ruby/structures/RubyMemoryControl.cc')
-rw-r--r--src/mem/ruby/structures/RubyMemoryControl.cc6
1 files changed, 3 insertions, 3 deletions
diff --git a/src/mem/ruby/structures/RubyMemoryControl.cc b/src/mem/ruby/structures/RubyMemoryControl.cc
index 0521aac06..413850627 100644
--- a/src/mem/ruby/structures/RubyMemoryControl.cc
+++ b/src/mem/ruby/structures/RubyMemoryControl.cc
@@ -176,7 +176,7 @@ void
RubyMemoryControl::init()
{
m_msg_counter = 0;
- assert(m_tFaw <= 62); // must fit in a uint64 shift register
+ assert(m_tFaw <= 62); // must fit in a uint64_t shift register
m_total_banks = m_banks_per_rank * m_ranks_per_dimm * m_dimms_per_channel;
m_total_ranks = m_ranks_per_dimm * m_dimms_per_channel;
@@ -213,7 +213,7 @@ RubyMemoryControl::init()
// m_tfaw_count keeps track of how many 1 bits are set
// in each shift register. When m_tfaw_count is >= 4,
// new activates are not allowed.
- m_tfaw_shift = new uint64[m_total_ranks];
+ m_tfaw_shift = new uint64_t[m_total_ranks];
m_tfaw_count = new int[m_total_ranks];
for (int i = 0; i < m_total_ranks; i++) {
m_tfaw_shift[i] = 0;
@@ -236,7 +236,7 @@ RubyMemoryControl::reset()
{
m_msg_counter = 0;
- assert(m_tFaw <= 62); // must fit in a uint64 shift register
+ assert(m_tFaw <= 62); // must fit in a uint64_t shift register
m_total_banks = m_banks_per_rank * m_ranks_per_dimm * m_dimms_per_channel;
m_total_ranks = m_ranks_per_dimm * m_dimms_per_channel;