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authorDavid Hashe <david.hashe@amd.com>2015-09-16 12:03:03 -0400
committerDavid Hashe <david.hashe@amd.com>2015-09-16 12:03:03 -0400
commitb6b972da99c22903671fd86c5d02dcc6657a18b8 (patch)
tree0286c23b1f6e9c16a4c123c60a1155ebe75698e0 /src/mem/ruby/structures
parent3edadb0bd3f74eeaadf45a40e08248707cc138a0 (diff)
downloadgem5-b6b972da99c22903671fd86c5d02dcc6657a18b8.tar.xz
ruby: rename System.{hh,cc} to RubySystem.{hh,cc}
The eventual aim of this change is to pass RubySystem pointers through to objects generated from the SLICC protocol code. Because some of these objects need to dereference their RubySystem pointers, they need access to the System.hh header file. In src/mem/ruby/SConscript, the MakeInclude function creates single-line header files in the build directory that do nothing except include the corresponding header file from the source tree. However, SLICC also generates a list of header files from its symbol table, and writes it to mem/protocol/Types.hh in the build directory. This code assumes that the header file name is the same as the class name. The end result of this is the many of the generated slicc files try to include RubySystem.hh, when the file they really need is System.hh. The path of least resistence is just to rename System.hh to RubySystem.hh. --HG-- rename : src/mem/ruby/system/System.cc => src/mem/ruby/system/RubySystem.cc rename : src/mem/ruby/system/System.hh => src/mem/ruby/system/RubySystem.hh
Diffstat (limited to 'src/mem/ruby/structures')
-rw-r--r--src/mem/ruby/structures/BankedArray.cc2
-rw-r--r--src/mem/ruby/structures/BankedArray.hh2
-rw-r--r--src/mem/ruby/structures/CacheMemory.cc2
-rw-r--r--src/mem/ruby/structures/DirectoryMemory.cc2
-rw-r--r--src/mem/ruby/structures/Prefetcher.cc2
-rw-r--r--src/mem/ruby/structures/Prefetcher.hh2
-rw-r--r--src/mem/ruby/structures/RubyMemoryControl.cc2
-rw-r--r--src/mem/ruby/structures/RubyMemoryControl.hh2
-rw-r--r--src/mem/ruby/structures/TimerTable.cc3
-rw-r--r--src/mem/ruby/structures/WireBuffer.cc5
10 files changed, 13 insertions, 11 deletions
diff --git a/src/mem/ruby/structures/BankedArray.cc b/src/mem/ruby/structures/BankedArray.cc
index b25962df6..550693ca2 100644
--- a/src/mem/ruby/structures/BankedArray.cc
+++ b/src/mem/ruby/structures/BankedArray.cc
@@ -31,7 +31,7 @@
#include "base/intmath.hh"
#include "mem/ruby/structures/BankedArray.hh"
-#include "mem/ruby/system/System.hh"
+#include "mem/ruby/system/RubySystem.hh"
BankedArray::BankedArray(unsigned int banks, Cycles accessLatency,
unsigned int startIndexBit, RubySystem *rs)
diff --git a/src/mem/ruby/structures/BankedArray.hh b/src/mem/ruby/structures/BankedArray.hh
index 179676f19..e2359afc9 100644
--- a/src/mem/ruby/structures/BankedArray.hh
+++ b/src/mem/ruby/structures/BankedArray.hh
@@ -35,7 +35,7 @@
#include <vector>
#include "mem/ruby/common/TypeDefines.hh"
-#include "mem/ruby/system/System.hh"
+#include "mem/ruby/system/RubySystem.hh"
#include "sim/core.hh"
class BankedArray
diff --git a/src/mem/ruby/structures/CacheMemory.cc b/src/mem/ruby/structures/CacheMemory.cc
index 931f58a8e..a269d4f5b 100644
--- a/src/mem/ruby/structures/CacheMemory.cc
+++ b/src/mem/ruby/structures/CacheMemory.cc
@@ -34,7 +34,7 @@
#include "debug/RubyStats.hh"
#include "mem/protocol/AccessPermission.hh"
#include "mem/ruby/structures/CacheMemory.hh"
-#include "mem/ruby/system/System.hh"
+#include "mem/ruby/system/RubySystem.hh"
using namespace std;
diff --git a/src/mem/ruby/structures/DirectoryMemory.cc b/src/mem/ruby/structures/DirectoryMemory.cc
index 82388a895..267c07174 100644
--- a/src/mem/ruby/structures/DirectoryMemory.cc
+++ b/src/mem/ruby/structures/DirectoryMemory.cc
@@ -31,7 +31,7 @@
#include "debug/RubyStats.hh"
#include "mem/ruby/slicc_interface/RubySlicc_Util.hh"
#include "mem/ruby/structures/DirectoryMemory.hh"
-#include "mem/ruby/system/System.hh"
+#include "mem/ruby/system/RubySystem.hh"
using namespace std;
diff --git a/src/mem/ruby/structures/Prefetcher.cc b/src/mem/ruby/structures/Prefetcher.cc
index fbf027bef..d12665ae9 100644
--- a/src/mem/ruby/structures/Prefetcher.cc
+++ b/src/mem/ruby/structures/Prefetcher.cc
@@ -29,7 +29,7 @@
#include "debug/RubyPrefetcher.hh"
#include "mem/ruby/slicc_interface/RubySlicc_ComponentMapping.hh"
#include "mem/ruby/structures/Prefetcher.hh"
-#include "mem/ruby/system/System.hh"
+#include "mem/ruby/system/RubySystem.hh"
Prefetcher*
PrefetcherParams::create()
diff --git a/src/mem/ruby/structures/Prefetcher.hh b/src/mem/ruby/structures/Prefetcher.hh
index d5c3d4b58..9c3c06851 100644
--- a/src/mem/ruby/structures/Prefetcher.hh
+++ b/src/mem/ruby/structures/Prefetcher.hh
@@ -38,7 +38,7 @@
#include "mem/ruby/network/MessageBuffer.hh"
#include "mem/ruby/slicc_interface/AbstractController.hh"
#include "mem/ruby/slicc_interface/RubyRequest.hh"
-#include "mem/ruby/system/System.hh"
+#include "mem/ruby/system/RubySystem.hh"
#include "params/Prefetcher.hh"
#include "sim/sim_object.hh"
#include "sim/system.hh"
diff --git a/src/mem/ruby/structures/RubyMemoryControl.cc b/src/mem/ruby/structures/RubyMemoryControl.cc
index 413850627..452606451 100644
--- a/src/mem/ruby/structures/RubyMemoryControl.cc
+++ b/src/mem/ruby/structures/RubyMemoryControl.cc
@@ -114,7 +114,7 @@
#include "mem/ruby/slicc_interface/Message.hh"
#include "mem/ruby/slicc_interface/RubySlicc_ComponentMapping.hh"
#include "mem/ruby/structures/RubyMemoryControl.hh"
-#include "mem/ruby/system/System.hh"
+#include "mem/ruby/system/RubySystem.hh"
using namespace std;
diff --git a/src/mem/ruby/structures/RubyMemoryControl.hh b/src/mem/ruby/structures/RubyMemoryControl.hh
index 376ce4d75..f5f31458b 100644
--- a/src/mem/ruby/structures/RubyMemoryControl.hh
+++ b/src/mem/ruby/structures/RubyMemoryControl.hh
@@ -39,7 +39,7 @@
#include "mem/ruby/common/Address.hh"
#include "mem/ruby/profiler/MemCntrlProfiler.hh"
#include "mem/ruby/structures/MemoryNode.hh"
-#include "mem/ruby/system/System.hh"
+#include "mem/ruby/system/RubySystem.hh"
#include "params/RubyMemoryControl.hh"
// This constant is part of the definition of tFAW; see
diff --git a/src/mem/ruby/structures/TimerTable.cc b/src/mem/ruby/structures/TimerTable.cc
index 7d0dd3c01..17dac6fc0 100644
--- a/src/mem/ruby/structures/TimerTable.cc
+++ b/src/mem/ruby/structures/TimerTable.cc
@@ -27,7 +27,8 @@
*/
#include "mem/ruby/structures/TimerTable.hh"
-#include "mem/ruby/system/System.hh"
+
+#include "mem/ruby/system/RubySystem.hh"
TimerTable::TimerTable()
: m_next_time(0)
diff --git a/src/mem/ruby/structures/WireBuffer.cc b/src/mem/ruby/structures/WireBuffer.cc
index 0375d9446..e2f113643 100644
--- a/src/mem/ruby/structures/WireBuffer.cc
+++ b/src/mem/ruby/structures/WireBuffer.cc
@@ -35,7 +35,7 @@
#include "base/cprintf.hh"
#include "base/stl_helpers.hh"
#include "mem/ruby/structures/WireBuffer.hh"
-#include "mem/ruby/system/System.hh"
+#include "mem/ruby/system/RubySystem.hh"
using namespace std;
@@ -121,7 +121,8 @@ WireBuffer::recycle()
push_heap(m_message_queue.begin(), m_message_queue.end(),
greater<MsgPtr>());
m_consumer_ptr->
- scheduleEventAbsolute(m_ruby_system->curCycle() + Cycles(1));
+ scheduleEventAbsolute(m_ruby_system->clockPeriod()
+ * (m_ruby_system->curCycle() + Cycles(1)));
}
bool