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| author | Andreas Sandberg <andreas.sandberg@arm.com> | 2016-04-07 10:42:07 +0100 |
|---|---|---|
| committer | Andreas Sandberg <andreas.sandberg@arm.com> | 2016-04-07 10:42:07 +0100 |
| commit | fd52a63e24fe047e1dafc48e5da9b4ce1b086c49 (patch) | |
| tree | 65a7eef6c12995b1215ce5b0622da7732fd87cea /src/mem/ruby/structures | |
| parent | be28d96510e0e722db83b26f1a12d3f5de979b32 (diff) | |
| download | gem5-fd52a63e24fe047e1dafc48e5da9b4ce1b086c49.tar.xz | |
Revert to 74c1e6513bd0 (sim: Thermal support for Linux)
Diffstat (limited to 'src/mem/ruby/structures')
| -rw-r--r-- | src/mem/ruby/structures/CacheMemory.cc | 2 | ||||
| -rw-r--r-- | src/mem/ruby/structures/Prefetcher.cc | 2 |
2 files changed, 0 insertions, 4 deletions
diff --git a/src/mem/ruby/structures/CacheMemory.cc b/src/mem/ruby/structures/CacheMemory.cc index 36d109769..f7c196119 100644 --- a/src/mem/ruby/structures/CacheMemory.cc +++ b/src/mem/ruby/structures/CacheMemory.cc @@ -488,8 +488,6 @@ CacheMemory::isLocked(Addr address, int context) void CacheMemory::regStats() { - SimObject::regStats(); - m_demand_hits .name(name() + ".demand_hits") .desc("Number of cache demand hits") diff --git a/src/mem/ruby/structures/Prefetcher.cc b/src/mem/ruby/structures/Prefetcher.cc index eef51dcf7..ce6d36c04 100644 --- a/src/mem/ruby/structures/Prefetcher.cc +++ b/src/mem/ruby/structures/Prefetcher.cc @@ -86,8 +86,6 @@ Prefetcher::~Prefetcher() void Prefetcher::regStats() { - SimObject::regStats(); - numMissObserved .name(name() + ".miss_observed") .desc("number of misses observed") |