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authorNilay Vaish <nilay@cs.wisc.edu>2014-09-01 16:55:50 -0500
committerNilay Vaish <nilay@cs.wisc.edu>2014-09-01 16:55:50 -0500
commit2cbe7c705be1cce44c5581fa58569cd95cc0f62d (patch)
treedf30549e0d7683b0f4c58039cd9c6247b54f7033 /src/mem/ruby/structures
parent4ccdf8fb81ff670f111428c31b9741c926d87d20 (diff)
downloadgem5-2cbe7c705be1cce44c5581fa58569cd95cc0f62d.tar.xz
ruby: remove typedef of Index as int64
The Index type defined as typedef int64 does not really provide any help since in most places we use primitive types instead of Index. Also, the name Index is very generic that it does not merit being used as a typename.
Diffstat (limited to 'src/mem/ruby/structures')
-rw-r--r--src/mem/ruby/structures/AbstractReplacementPolicy.hh14
-rw-r--r--src/mem/ruby/structures/BankedArray.cc4
-rw-r--r--src/mem/ruby/structures/BankedArray.hh6
-rw-r--r--src/mem/ruby/structures/CacheMemory.cc32
-rw-r--r--src/mem/ruby/structures/CacheMemory.hh6
-rw-r--r--src/mem/ruby/structures/DirectoryMemory.cc2
-rw-r--r--src/mem/ruby/structures/LRUPolicy.hh16
-rw-r--r--src/mem/ruby/structures/PseudoLRUPolicy.hh18
8 files changed, 49 insertions, 49 deletions
diff --git a/src/mem/ruby/structures/AbstractReplacementPolicy.hh b/src/mem/ruby/structures/AbstractReplacementPolicy.hh
index 3c492377e..743d5ce0d 100644
--- a/src/mem/ruby/structures/AbstractReplacementPolicy.hh
+++ b/src/mem/ruby/structures/AbstractReplacementPolicy.hh
@@ -34,17 +34,17 @@
class AbstractReplacementPolicy
{
public:
- AbstractReplacementPolicy(Index num_sets, Index assoc);
+ AbstractReplacementPolicy(int64 num_sets, int64 assoc);
virtual ~AbstractReplacementPolicy();
/* touch a block. a.k.a. update timestamp */
- virtual void touch(Index set, Index way, Tick time) = 0;
+ virtual void touch(int64 set, int64 way, Tick time) = 0;
/* returns the way to replace */
- virtual Index getVictim(Index set) const = 0;
+ virtual int64 getVictim(int64 set) const = 0;
/* get the time of the last access */
- Tick getLastAccess(Index set, Index way);
+ Tick getLastAccess(int64 set, int64 way);
protected:
unsigned m_num_sets; /** total number of sets */
@@ -53,8 +53,8 @@ class AbstractReplacementPolicy
};
inline
-AbstractReplacementPolicy::AbstractReplacementPolicy(Index num_sets,
- Index assoc)
+AbstractReplacementPolicy::AbstractReplacementPolicy(int64 num_sets,
+ int64 assoc)
{
m_num_sets = num_sets;
m_assoc = assoc;
@@ -81,7 +81,7 @@ AbstractReplacementPolicy::~AbstractReplacementPolicy()
}
inline Tick
-AbstractReplacementPolicy::getLastAccess(Index set, Index way)
+AbstractReplacementPolicy::getLastAccess(int64 set, int64 way)
{
return m_last_ref_ptr[set][way];
}
diff --git a/src/mem/ruby/structures/BankedArray.cc b/src/mem/ruby/structures/BankedArray.cc
index 0644ffe8b..0207f96be 100644
--- a/src/mem/ruby/structures/BankedArray.cc
+++ b/src/mem/ruby/structures/BankedArray.cc
@@ -48,7 +48,7 @@ BankedArray::BankedArray(unsigned int banks, Cycles accessLatency,
}
bool
-BankedArray::tryAccess(Index idx)
+BankedArray::tryAccess(int64 idx)
{
if (accessLatency == 0)
return true;
@@ -76,7 +76,7 @@ BankedArray::tryAccess(Index idx)
}
unsigned int
-BankedArray::mapIndexToBank(Index idx)
+BankedArray::mapIndexToBank(int64 idx)
{
if (banks == 1) {
return 0;
diff --git a/src/mem/ruby/structures/BankedArray.hh b/src/mem/ruby/structures/BankedArray.hh
index 89007befa..c594458e6 100644
--- a/src/mem/ruby/structures/BankedArray.hh
+++ b/src/mem/ruby/structures/BankedArray.hh
@@ -49,7 +49,7 @@ class BankedArray
{
public:
AccessRecord() : idx(0), startAccess(0), endAccess(0) {}
- Index idx;
+ int64 idx;
Tick startAccess;
Tick endAccess;
};
@@ -58,14 +58,14 @@ class BankedArray
// otherwise, schedule the event and wait for it to complete
std::vector<AccessRecord> busyBanks;
- unsigned int mapIndexToBank(Index idx);
+ unsigned int mapIndexToBank(int64 idx);
public:
BankedArray(unsigned int banks, Cycles accessLatency, unsigned int startIndexBit);
// Note: We try the access based on the cache index, not the address
// This is so we don't get aliasing on blocks being replaced
- bool tryAccess(Index idx);
+ bool tryAccess(int64 idx);
};
diff --git a/src/mem/ruby/structures/CacheMemory.cc b/src/mem/ruby/structures/CacheMemory.cc
index 7ce6cd584..9c17508a8 100644
--- a/src/mem/ruby/structures/CacheMemory.cc
+++ b/src/mem/ruby/structures/CacheMemory.cc
@@ -104,7 +104,7 @@ CacheMemory::~CacheMemory()
}
// convert a Address to its location in the cache
-Index
+int64
CacheMemory::addressToCacheSet(const Address& address) const
{
assert(address == line_address(address));
@@ -115,7 +115,7 @@ CacheMemory::addressToCacheSet(const Address& address) const
// Given a cache index: returns the index of the tag in a set.
// returns -1 if the tag is not found.
int
-CacheMemory::findTagInSet(Index cacheSet, const Address& tag) const
+CacheMemory::findTagInSet(int64 cacheSet, const Address& tag) const
{
assert(tag == line_address(tag));
// search the set for the tags
@@ -130,7 +130,7 @@ CacheMemory::findTagInSet(Index cacheSet, const Address& tag) const
// Given a cache index: returns the index of the tag in a set.
// returns -1 if the tag is not found.
int
-CacheMemory::findTagInSetIgnorePermissions(Index cacheSet,
+CacheMemory::findTagInSetIgnorePermissions(int64 cacheSet,
const Address& tag) const
{
assert(tag == line_address(tag));
@@ -147,7 +147,7 @@ CacheMemory::tryCacheAccess(const Address& address, RubyRequestType type,
{
assert(address == line_address(address));
DPRINTF(RubyCache, "address: %s\n", address);
- Index cacheSet = addressToCacheSet(address);
+ int64 cacheSet = addressToCacheSet(address);
int loc = findTagInSet(cacheSet, address);
if (loc != -1) {
// Do we even have a tag match?
@@ -174,7 +174,7 @@ CacheMemory::testCacheAccess(const Address& address, RubyRequestType type,
{
assert(address == line_address(address));
DPRINTF(RubyCache, "address: %s\n", address);
- Index cacheSet = addressToCacheSet(address);
+ int64 cacheSet = addressToCacheSet(address);
int loc = findTagInSet(cacheSet, address);
if (loc != -1) {
@@ -196,7 +196,7 @@ bool
CacheMemory::isTagPresent(const Address& address) const
{
assert(address == line_address(address));
- Index cacheSet = addressToCacheSet(address);
+ int64 cacheSet = addressToCacheSet(address);
int loc = findTagInSet(cacheSet, address);
if (loc == -1) {
@@ -216,7 +216,7 @@ CacheMemory::cacheAvail(const Address& address) const
{
assert(address == line_address(address));
- Index cacheSet = addressToCacheSet(address);
+ int64 cacheSet = addressToCacheSet(address);
for (int i = 0; i < m_cache_assoc; i++) {
AbstractCacheEntry* entry = m_cache[cacheSet][i];
@@ -242,7 +242,7 @@ CacheMemory::allocate(const Address& address, AbstractCacheEntry* entry)
DPRINTF(RubyCache, "address: %s\n", address);
// Find the first open slot
- Index cacheSet = addressToCacheSet(address);
+ int64 cacheSet = addressToCacheSet(address);
std::vector<AbstractCacheEntry*> &set = m_cache[cacheSet];
for (int i = 0; i < m_cache_assoc; i++) {
if (!set[i] || set[i]->m_Permission == AccessPermission_NotPresent) {
@@ -268,7 +268,7 @@ CacheMemory::deallocate(const Address& address)
assert(address == line_address(address));
assert(isTagPresent(address));
DPRINTF(RubyCache, "address: %s\n", address);
- Index cacheSet = addressToCacheSet(address);
+ int64 cacheSet = addressToCacheSet(address);
int loc = findTagInSet(cacheSet, address);
if (loc != -1) {
delete m_cache[cacheSet][loc];
@@ -284,7 +284,7 @@ CacheMemory::cacheProbe(const Address& address) const
assert(address == line_address(address));
assert(!cacheAvail(address));
- Index cacheSet = addressToCacheSet(address);
+ int64 cacheSet = addressToCacheSet(address);
return m_cache[cacheSet][m_replacementPolicy_ptr->getVictim(cacheSet)]->
m_Address;
}
@@ -294,7 +294,7 @@ AbstractCacheEntry*
CacheMemory::lookup(const Address& address)
{
assert(address == line_address(address));
- Index cacheSet = addressToCacheSet(address);
+ int64 cacheSet = addressToCacheSet(address);
int loc = findTagInSet(cacheSet, address);
if(loc == -1) return NULL;
return m_cache[cacheSet][loc];
@@ -305,7 +305,7 @@ const AbstractCacheEntry*
CacheMemory::lookup(const Address& address) const
{
assert(address == line_address(address));
- Index cacheSet = addressToCacheSet(address);
+ int64 cacheSet = addressToCacheSet(address);
int loc = findTagInSet(cacheSet, address);
if(loc == -1) return NULL;
return m_cache[cacheSet][loc];
@@ -315,7 +315,7 @@ CacheMemory::lookup(const Address& address) const
void
CacheMemory::setMRU(const Address& address)
{
- Index cacheSet = addressToCacheSet(address);
+ int64 cacheSet = addressToCacheSet(address);
int loc = findTagInSet(cacheSet, address);
if(loc != -1)
@@ -391,7 +391,7 @@ CacheMemory::setLocked(const Address& address, int context)
{
DPRINTF(RubyCache, "Setting Lock for addr: %x to %d\n", address, context);
assert(address == line_address(address));
- Index cacheSet = addressToCacheSet(address);
+ int64 cacheSet = addressToCacheSet(address);
int loc = findTagInSet(cacheSet, address);
assert(loc != -1);
m_cache[cacheSet][loc]->m_locked = context;
@@ -402,7 +402,7 @@ CacheMemory::clearLocked(const Address& address)
{
DPRINTF(RubyCache, "Clear Lock for addr: %x\n", address);
assert(address == line_address(address));
- Index cacheSet = addressToCacheSet(address);
+ int64 cacheSet = addressToCacheSet(address);
int loc = findTagInSet(cacheSet, address);
assert(loc != -1);
m_cache[cacheSet][loc]->m_locked = -1;
@@ -412,7 +412,7 @@ bool
CacheMemory::isLocked(const Address& address, int context)
{
assert(address == line_address(address));
- Index cacheSet = addressToCacheSet(address);
+ int64 cacheSet = addressToCacheSet(address);
int loc = findTagInSet(cacheSet, address);
assert(loc != -1);
DPRINTF(RubyCache, "Testing Lock for addr: %llx cur %d con %d\n",
diff --git a/src/mem/ruby/structures/CacheMemory.hh b/src/mem/ruby/structures/CacheMemory.hh
index 87a0b40c0..2a8a09fe9 100644
--- a/src/mem/ruby/structures/CacheMemory.hh
+++ b/src/mem/ruby/structures/CacheMemory.hh
@@ -131,12 +131,12 @@ class CacheMemory : public SimObject
private:
// convert a Address to its location in the cache
- Index addressToCacheSet(const Address& address) const;
+ int64 addressToCacheSet(const Address& address) const;
// Given a cache tag: returns the index of the tag in a set.
// returns -1 if the tag is not found.
- int findTagInSet(Index line, const Address& tag) const;
- int findTagInSetIgnorePermissions(Index cacheSet,
+ int findTagInSet(int64 line, const Address& tag) const;
+ int findTagInSetIgnorePermissions(int64 cacheSet,
const Address& tag) const;
// Private copy constructor and assignment operator
diff --git a/src/mem/ruby/structures/DirectoryMemory.cc b/src/mem/ruby/structures/DirectoryMemory.cc
index db165460c..2f972674f 100644
--- a/src/mem/ruby/structures/DirectoryMemory.cc
+++ b/src/mem/ruby/structures/DirectoryMemory.cc
@@ -171,7 +171,7 @@ DirectoryMemory::invalidateBlock(PhysAddress address)
else {
assert(isPresent(address));
- Index index = address.memoryModuleIndex();
+ int64 index = address.memoryModuleIndex();
if (index < 0 || index > m_size) {
ERROR_MSG("Directory Memory Assertion: "
diff --git a/src/mem/ruby/structures/LRUPolicy.hh b/src/mem/ruby/structures/LRUPolicy.hh
index bb61b9d50..0d18e208d 100644
--- a/src/mem/ruby/structures/LRUPolicy.hh
+++ b/src/mem/ruby/structures/LRUPolicy.hh
@@ -36,15 +36,15 @@
class LRUPolicy : public AbstractReplacementPolicy
{
public:
- LRUPolicy(Index num_sets, Index assoc);
+ LRUPolicy(int64 num_sets, int64 assoc);
~LRUPolicy();
- void touch(Index set, Index way, Tick time);
- Index getVictim(Index set) const;
+ void touch(int64 set, int64 way, Tick time);
+ int64 getVictim(int64 set) const;
};
inline
-LRUPolicy::LRUPolicy(Index num_sets, Index assoc)
+LRUPolicy::LRUPolicy(int64 num_sets, int64 assoc)
: AbstractReplacementPolicy(num_sets, assoc)
{
}
@@ -55,7 +55,7 @@ LRUPolicy::~LRUPolicy()
}
inline void
-LRUPolicy::touch(Index set, Index index, Tick time)
+LRUPolicy::touch(int64 set, int64 index, Tick time)
{
assert(index >= 0 && index < m_assoc);
assert(set >= 0 && set < m_num_sets);
@@ -63,12 +63,12 @@ LRUPolicy::touch(Index set, Index index, Tick time)
m_last_ref_ptr[set][index] = time;
}
-inline Index
-LRUPolicy::getVictim(Index set) const
+inline int64
+LRUPolicy::getVictim(int64 set) const
{
// assert(m_assoc != 0);
Tick time, smallest_time;
- Index smallest_index;
+ int64 smallest_index;
smallest_index = 0;
smallest_time = m_last_ref_ptr[set][0];
diff --git a/src/mem/ruby/structures/PseudoLRUPolicy.hh b/src/mem/ruby/structures/PseudoLRUPolicy.hh
index e464bbeac..8722728cf 100644
--- a/src/mem/ruby/structures/PseudoLRUPolicy.hh
+++ b/src/mem/ruby/structures/PseudoLRUPolicy.hh
@@ -47,11 +47,11 @@
class PseudoLRUPolicy : public AbstractReplacementPolicy
{
public:
- PseudoLRUPolicy(Index num_sets, Index assoc);
+ PseudoLRUPolicy(int64 num_sets, int64 assoc);
~PseudoLRUPolicy();
- void touch(Index set, Index way, Tick time);
- Index getVictim(Index set) const;
+ void touch(int64 set, int64 way, Tick time);
+ int64 getVictim(int64 set) const;
private:
unsigned int m_effective_assoc; /** nearest (to ceiling) power of 2 */
@@ -61,11 +61,11 @@ class PseudoLRUPolicy : public AbstractReplacementPolicy
};
inline
-PseudoLRUPolicy::PseudoLRUPolicy(Index num_sets, Index assoc)
+PseudoLRUPolicy::PseudoLRUPolicy(int64 num_sets, int64 assoc)
: AbstractReplacementPolicy(num_sets, assoc)
{
// associativity cannot exceed capacity of tree representation
- assert(num_sets > 0 && assoc > 1 && assoc <= (Index) sizeof(uint64)*4);
+ assert(num_sets > 0 && assoc > 1 && assoc <= sizeof(uint64)*4);
m_trees = NULL;
m_num_levels = 0;
@@ -96,7 +96,7 @@ PseudoLRUPolicy::~PseudoLRUPolicy()
}
inline void
-PseudoLRUPolicy::touch(Index set, Index index, Tick time)
+PseudoLRUPolicy::touch(int64 set, int64 index, Tick time)
{
assert(index >= 0 && index < m_assoc);
assert(set >= 0 && set < m_num_sets);
@@ -114,11 +114,11 @@ PseudoLRUPolicy::touch(Index set, Index index, Tick time)
m_last_ref_ptr[set][index] = time;
}
-inline Index
-PseudoLRUPolicy::getVictim(Index set) const
+inline int64
+PseudoLRUPolicy::getVictim(int64 set) const
{
// assert(m_assoc != 0);
- Index index = 0;
+ int64 index = 0;
int tree_index = 0;
int node_val;