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authorIru Cai <mytbk920423@gmail.com>2019-02-28 17:07:16 +0800
committerIru Cai <mytbk920423@gmail.com>2019-03-20 17:32:12 +0800
commit32986563546481d9ac17280cd0aadb39b87b9817 (patch)
treea3acaa4ffdd3764d92dda1973e996ca9f6a09b76 /src/mem/ruby/structures
parent0c50a0b4fe3956f9d2e08e75d47c9cbd79bf0268 (diff)
downloadgem5-32986563546481d9ac17280cd0aadb39b87b9817.tar.xz
invisispec-1.0 source
Diffstat (limited to 'src/mem/ruby/structures')
-rw-r--r--src/mem/ruby/structures/CacheMemory.cc4
1 files changed, 3 insertions, 1 deletions
diff --git a/src/mem/ruby/structures/CacheMemory.cc b/src/mem/ruby/structures/CacheMemory.cc
index 8d99c90aa..dc5898bea 100644
--- a/src/mem/ruby/structures/CacheMemory.cc
+++ b/src/mem/ruby/structures/CacheMemory.cc
@@ -176,7 +176,9 @@ CacheMemory::tryCacheAccess(Addr address, RubyRequestType type,
return true;
}
if ((entry->m_Permission == AccessPermission_Read_Only) &&
- (type == RubyRequestType_LD || type == RubyRequestType_IFETCH)) {
+ (type == RubyRequestType_LD ||
+ type == RubyRequestType_IFETCH ||
+ type == RubyRequestType_SPEC_LD)) {
return true;
}
// The line must not be accessible