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authorAndreas Hansson <andreas.hansson@arm.com>2012-09-07 12:34:38 -0400
committerAndreas Hansson <andreas.hansson@arm.com>2012-09-07 12:34:38 -0400
commit287ea1a081c5dd3213069755dbbd3d7bf736bacc (patch)
treee48487569786a562138445d746354b610cf5011f /src/mem/ruby/system/BankedArray.hh
parent4124ea09f8e2f6934fe746ff7c244dba7230cac9 (diff)
downloadgem5-287ea1a081c5dd3213069755dbbd3d7bf736bacc.tar.xz
Param: Transition to Cycles for relevant parameters
This patch is a first step to using Cycles as a parameter type. The main affected modules are the CPUs and the Ruby caches. There are definitely plenty more places that are affected, but this patch serves as a starting point to making the transition. An important part of this patch is to actually enable parameters to be specified as Param.Cycles which involves some changes to params.py.
Diffstat (limited to 'src/mem/ruby/system/BankedArray.hh')
-rw-r--r--src/mem/ruby/system/BankedArray.hh4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/mem/ruby/system/BankedArray.hh b/src/mem/ruby/system/BankedArray.hh
index 15c2d2c15..7ebf39dfb 100644
--- a/src/mem/ruby/system/BankedArray.hh
+++ b/src/mem/ruby/system/BankedArray.hh
@@ -43,7 +43,7 @@ class BankedArray : public EventManager
{
private:
unsigned int banks;
- unsigned int accessLatency;
+ Cycles accessLatency;
unsigned int bankBits;
unsigned int startIndexBit;
@@ -66,7 +66,7 @@ private:
unsigned int mapIndexToBank(Index idx);
public:
- BankedArray(unsigned int banks, unsigned int accessLatency, unsigned int startIndexBit);
+ BankedArray(unsigned int banks, Cycles accessLatency, unsigned int startIndexBit);
// Note: We try the access based on the cache index, not the address
// This is so we don't get aliasing on blocks being replaced