diff options
| author | Gabe Black <gblack@eecs.umich.edu> | 2012-01-07 02:16:37 -0800 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2012-01-07 02:16:37 -0800 |
| commit | 241cc0c8402f1b9f2ec20d1cc152d96930959b2a (patch) | |
| tree | 666717370cc9db4775ef46c10f7d8a92a34f40e2 /src/mem/ruby/system/Cache.py | |
| parent | ec936364b7238cddea7734ea79c6e04b52a683c6 (diff) | |
| parent | 4b772782871f265cf7372c984ad750803396938c (diff) | |
| download | gem5-241cc0c8402f1b9f2ec20d1cc152d96930959b2a.tar.xz | |
Another merge with the main repository.
Diffstat (limited to 'src/mem/ruby/system/Cache.py')
| -rw-r--r-- | src/mem/ruby/system/Cache.py | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/mem/ruby/system/Cache.py b/src/mem/ruby/system/Cache.py index ab3ec4b29..79ab9b070 100644 --- a/src/mem/ruby/system/Cache.py +++ b/src/mem/ruby/system/Cache.py @@ -39,3 +39,4 @@ class RubyCache(SimObject): assoc = Param.Int(""); replacement_policy = Param.String("PSEUDO_LRU", ""); start_index_bit = Param.Int(6, "index start, default 6 for 64-byte line"); + is_icache = Param.Bool(False, "is instruction only cache"); |