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author | Nilay Vaish ext:(%2C%20Malek%20Musleh%20%3Cmalek.musleh%40gmail.com%3E) <nilay@cs.wisc.edu> | 2013-05-21 11:31:31 -0500 |
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committer | Nilay Vaish ext:(%2C%20Malek%20Musleh%20%3Cmalek.musleh%40gmail.com%3E) <nilay@cs.wisc.edu> | 2013-05-21 11:31:31 -0500 |
commit | 59a7abff29aa5a687e1693f003c20d7e2000c40a (patch) | |
tree | e1cf2cf822cf5b1002a6b72d8d613f65e0e1df8d /src/mem/ruby/system/CacheMemory.cc | |
parent | d3c33d91b68e917478dba48c03a674b21ebd2747 (diff) | |
download | gem5-59a7abff29aa5a687e1693f003c20d7e2000c40a.tar.xz |
ruby: add stats to .sm files, remove cache profiler
This patch changes the way cache statistics are collected in ruby.
As of now, there is separate entity called CacheProfiler which holds
statistical variables for caches. The CacheMemory class defines different
functions for accessing the CacheProfiler. These functions are then invoked
in the .sm files. I find this approach opaque and prone to error. Secondly,
we probably should not be paying the cost of a function call for recording
statistics.
Instead, this patch allows for accessing statistical variables in the
.sm files. The collection would become transparent. Secondly, it would happen
in place, so no function calls. The patch also removes the CacheProfiler class.
--HG--
rename : src/mem/slicc/ast/InfixOperatorExprAST.py => src/mem/slicc/ast/OperatorExprAST.py
Diffstat (limited to 'src/mem/ruby/system/CacheMemory.cc')
-rw-r--r-- | src/mem/ruby/system/CacheMemory.cc | 143 |
1 files changed, 85 insertions, 58 deletions
diff --git a/src/mem/ruby/system/CacheMemory.cc b/src/mem/ruby/system/CacheMemory.cc index 81d73f5b4..f57c4c7ad 100644 --- a/src/mem/ruby/system/CacheMemory.cc +++ b/src/mem/ruby/system/CacheMemory.cc @@ -60,7 +60,6 @@ CacheMemory::CacheMemory(const Params *p) m_latency = p->latency; m_cache_assoc = p->assoc; m_policy = p->replacement_policy; - m_profiler_ptr = new CacheProfiler(name()); m_start_index_bit = p->start_index_bit; m_is_instruction_only_cache = p->is_icache; m_resource_stalls = p->resourceStalls; @@ -97,7 +96,6 @@ CacheMemory::~CacheMemory() { if (m_replacementPolicy_ptr != NULL) delete m_replacementPolicy_ptr; - delete m_profiler_ptr; for (int i = 0; i < m_cache_num_sets; i++) { for (int j = 0; j < m_cache_assoc; j++) { delete m_cache[i][j]; @@ -325,24 +323,6 @@ CacheMemory::setMRU(const Address& address) } void -CacheMemory::profileMiss(const RubyRequest& msg) -{ - m_profiler_ptr->addCacheStatSample(msg.getType(), - msg.getAccessMode(), - msg.getPrefetch()); -} - -void -CacheMemory::profileGenericRequest(GenericRequestType requestType, - RubyAccessMode accessType, - PrefetchBit pfBit) -{ - m_profiler_ptr->addGenericStatSample(requestType, - accessType, - pfBit); -} - -void CacheMemory::recordCacheContents(int cntrl, CacheRecorder* tr) const { uint64 warmedUpBlocks = 0; @@ -407,18 +387,6 @@ CacheMemory::printData(ostream& out) const } void -CacheMemory::clearStats() const -{ - m_profiler_ptr->clearStats(); -} - -void -CacheMemory::printStats(ostream& out) const -{ - m_profiler_ptr->printStats(out); -} - -void CacheMemory::setLocked(const Address& address, int context) { DPRINTF(RubyCache, "Setting Lock for addr: %x to %d\n", address, context); @@ -453,63 +421,118 @@ CacheMemory::isLocked(const Address& address, int context) } void -CacheMemory::recordRequestType(CacheRequestType requestType) { - DPRINTF(RubyStats, "Recorded statistic: %s\n", - CacheRequestType_to_string(requestType)); - switch(requestType) { - case CacheRequestType_DataArrayRead: - numDataArrayReads++; - return; - case CacheRequestType_DataArrayWrite: - numDataArrayWrites++; - return; - case CacheRequestType_TagArrayRead: - numTagArrayReads++; - return; - case CacheRequestType_TagArrayWrite: - numTagArrayWrites++; - return; - default: - warn("CacheMemory access_type not found: %s", - CacheRequestType_to_string(requestType)); - } -} +CacheMemory::regStats() +{ + m_demand_hits + .name(name() + ".demand_hits") + .desc("Number of cache demand hits") + ; -void -CacheMemory::regStats() { - using namespace Stats; + m_demand_misses + .name(name() + ".demand_misses") + .desc("Number of cache demand misses") + ; + + m_demand_accesses + .name(name() + ".demand_accesses") + .desc("Number of cache demand accesses") + ; + + m_demand_accesses = m_demand_hits + m_demand_misses; + + m_sw_prefetches + .name(name() + ".total_sw_prefetches") + .desc("Number of software prefetches") + .flags(Stats::nozero) + ; + + m_hw_prefetches + .name(name() + ".total_hw_prefetches") + .desc("Number of hardware prefetches") + .flags(Stats::nozero) + ; + + m_prefetches + .name(name() + ".total_prefetches") + .desc("Number of prefetches") + .flags(Stats::nozero) + ; + + m_prefetches = m_sw_prefetches + m_hw_prefetches; + + m_accessModeType + .init(RubyRequestType_NUM) + .name(name() + ".access_mode") + .flags(Stats::pdf | Stats::total) + ; + for (int i = 0; i < RubyAccessMode_NUM; i++) { + m_accessModeType + .subname(i, RubyAccessMode_to_string(RubyAccessMode(i))) + .flags(Stats::nozero) + ; + } numDataArrayReads .name(name() + ".num_data_array_reads") .desc("number of data array reads") + .flags(Stats::nozero) ; numDataArrayWrites .name(name() + ".num_data_array_writes") .desc("number of data array writes") + .flags(Stats::nozero) ; numTagArrayReads .name(name() + ".num_tag_array_reads") .desc("number of tag array reads") + .flags(Stats::nozero) ; numTagArrayWrites .name(name() + ".num_tag_array_writes") .desc("number of tag array writes") + .flags(Stats::nozero) ; numTagArrayStalls .name(name() + ".num_tag_array_stalls") .desc("number of stalls caused by tag array") + .flags(Stats::nozero) ; numDataArrayStalls .name(name() + ".num_data_array_stalls") .desc("number of stalls caused by data array") + .flags(Stats::nozero) ; } +void +CacheMemory::recordRequestType(CacheRequestType requestType) +{ + DPRINTF(RubyStats, "Recorded statistic: %s\n", + CacheRequestType_to_string(requestType)); + switch(requestType) { + case CacheRequestType_DataArrayRead: + numDataArrayReads++; + return; + case CacheRequestType_DataArrayWrite: + numDataArrayWrites++; + return; + case CacheRequestType_TagArrayRead: + numTagArrayReads++; + return; + case CacheRequestType_TagArrayWrite: + numTagArrayWrites++; + return; + default: + warn("CacheMemory access_type not found: %s", + CacheRequestType_to_string(requestType)); + } +} + bool CacheMemory::checkResourceAvailable(CacheResourceType res, Address addr) { @@ -520,14 +543,18 @@ CacheMemory::checkResourceAvailable(CacheResourceType res, Address addr) if (res == CacheResourceType_TagArray) { if (tagArray.tryAccess(addressToCacheSet(addr))) return true; else { - DPRINTF(RubyResourceStalls, "Tag array stall on addr %s in set %d\n", addr, addressToCacheSet(addr)); + DPRINTF(RubyResourceStalls, + "Tag array stall on addr %s in set %d\n", + addr, addressToCacheSet(addr)); numTagArrayStalls++; return false; } } else if (res == CacheResourceType_DataArray) { if (dataArray.tryAccess(addressToCacheSet(addr))) return true; else { - DPRINTF(RubyResourceStalls, "Data array stall on addr %s in set %d\n", addr, addressToCacheSet(addr)); + DPRINTF(RubyResourceStalls, + "Data array stall on addr %s in set %d\n", + addr, addressToCacheSet(addr)); numDataArrayStalls++; return false; } |