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author | Derek Hower <drh5@cs.wisc.edu> | 2009-07-20 09:40:43 -0500 |
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committer | Derek Hower <drh5@cs.wisc.edu> | 2009-07-20 09:40:43 -0500 |
commit | e59d0e3e89f46f35065ab318c8578941203cc657 (patch) | |
tree | 73dc7c9e8bd34c71712628326b4c9de69d4658c1 /src/mem/ruby/system/CacheMemory.hh | |
parent | 308419b947b46f065b7e539040a1a2ef89be6480 (diff) | |
download | gem5-e59d0e3e89f46f35065ab318c8578941203cc657.tar.xz |
ruby: moved cache stats from Profiler to CacheMemory
Caches are now responsible for their own statistic gathering. This
requires a direct callback from the protocol on misses, and so all
future protocols need to take this into account.
Diffstat (limited to 'src/mem/ruby/system/CacheMemory.hh')
-rw-r--r-- | src/mem/ruby/system/CacheMemory.hh | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/src/mem/ruby/system/CacheMemory.hh b/src/mem/ruby/system/CacheMemory.hh index c3b7da6ea..cfaa229a5 100644 --- a/src/mem/ruby/system/CacheMemory.hh +++ b/src/mem/ruby/system/CacheMemory.hh @@ -52,6 +52,8 @@ #include "mem/ruby/slicc_interface/AbstractCacheEntry.hh" #include "mem/ruby/system/System.hh" #include "mem/ruby/slicc_interface/AbstractController.hh" +#include "mem/ruby/profiler/CacheProfiler.hh" +#include "mem/protocol/CacheMsg.hh" #include <vector> class CacheMemory { @@ -111,6 +113,8 @@ public: // Set this address to most recently used void setMRU(const Address& address); + void profileMiss(const CacheMsg & msg); + void getMemoryValue(const Address& addr, char* value, unsigned int size_in_bytes ); void setMemoryValue(const Address& addr, char* value, @@ -123,6 +127,8 @@ public: void print(ostream& out) const; void printData(ostream& out) const; + void printStats(ostream& out) const; + private: // Private Methods @@ -154,6 +160,8 @@ private: AbstractReplacementPolicy *m_replacementPolicy_ptr; + CacheProfiler* m_profiler_ptr; + int m_cache_num_sets; int m_cache_num_set_bits; int m_cache_assoc; @@ -182,6 +190,7 @@ inline CacheMemory::CacheMemory(const string & name) : m_cache_name(name) { + m_profiler_ptr = new CacheProfiler(name); } inline @@ -496,6 +505,13 @@ void CacheMemory::setMRU(const Address& address) } inline +void CacheMemory::profileMiss(const CacheMsg & msg) +{ + m_profiler_ptr->addStatSample(msg.getType(), msg.getAccessMode(), + msg.getSize(), msg.getPrefetch()); +} + +inline void CacheMemory::recordCacheContents(CacheRecorder& tr) const { for (int i = 0; i < m_cache_num_sets; i++) { @@ -546,6 +562,12 @@ void CacheMemory::printData(ostream& out) const } inline +void CacheMemory::printStats(ostream& out) const +{ + m_profiler_ptr->printStats(out); +} + +inline void CacheMemory::getMemoryValue(const Address& addr, char* value, unsigned int size_in_bytes ){ AbstractCacheEntry& entry = lookup(line_address(addr)); |