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| author | Nilay Vaish <nilay@cs.wisc.edu> | 2011-03-19 18:34:37 -0500 |
|---|---|---|
| committer | Nilay Vaish <nilay@cs.wisc.edu> | 2011-03-19 18:34:37 -0500 |
| commit | 2f4276448b82b2aa077ae257171b5cb04b7048f6 (patch) | |
| tree | 7e5d6bdcf8b3028ac7aed6c889efb820b2db91d9 /src/mem/ruby/system/CacheMemory.hh | |
| parent | dd9083115ed3f1ee297c2ff7255fdd3fee276e7a (diff) | |
| download | gem5-2f4276448b82b2aa077ae257171b5cb04b7048f6.tar.xz | |
Ruby: Convert AccessModeType to RubyAccessMode
This patch converts AccessModeType to RubyAccessMode so that both the
protocol dependent and independent code uses the same access mode.
Diffstat (limited to 'src/mem/ruby/system/CacheMemory.hh')
| -rw-r--r-- | src/mem/ruby/system/CacheMemory.hh | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mem/ruby/system/CacheMemory.hh b/src/mem/ruby/system/CacheMemory.hh index 1f0ffd500..6e311edc3 100644 --- a/src/mem/ruby/system/CacheMemory.hh +++ b/src/mem/ruby/system/CacheMemory.hh @@ -110,7 +110,7 @@ class CacheMemory : public SimObject void profileMiss(const CacheMsg & msg); void profileGenericRequest(GenericRequestType requestType, - AccessModeType accessType, + RubyAccessMode accessType, PrefetchBit pfBit); void getMemoryValue(const Address& addr, char* value, |