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authorNathan Binkert <nate@binkert.org>2010-03-22 18:43:53 -0700
committerNathan Binkert <nate@binkert.org>2010-03-22 18:43:53 -0700
commit5ab13e2deb8f904ef2a233749193fa09ea7013c4 (patch)
tree07f5f02902f9e719fe58d1a9419b5a1d51f7a2ce /src/mem/ruby/system/DMASequencer.cc
parent2620e08722b38660658d46cdb76c337db18e877c (diff)
downloadgem5-5ab13e2deb8f904ef2a233749193fa09ea7013c4.tar.xz
ruby: style pass
Diffstat (limited to 'src/mem/ruby/system/DMASequencer.cc')
-rw-r--r--src/mem/ruby/system/DMASequencer.cc233
1 files changed, 116 insertions, 117 deletions
diff --git a/src/mem/ruby/system/DMASequencer.cc b/src/mem/ruby/system/DMASequencer.cc
index 063b66862..315dab62a 100644
--- a/src/mem/ruby/system/DMASequencer.cc
+++ b/src/mem/ruby/system/DMASequencer.cc
@@ -26,149 +26,148 @@
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
-#include "mem/ruby/system/DMASequencer.hh"
-#include "mem/ruby/buffers/MessageBuffer.hh"
-#include "mem/ruby/slicc_interface/AbstractController.hh"
-
-/* SLICC generated types */
#include "mem/protocol/SequencerMsg.hh"
#include "mem/protocol/SequencerRequestType.hh"
+#include "mem/ruby/buffers/MessageBuffer.hh"
+#include "mem/ruby/slicc_interface/AbstractController.hh"
+#include "mem/ruby/system/DMASequencer.hh"
#include "mem/ruby/system/System.hh"
-//
-// Fix me: This code needs comments!
-//
-
DMASequencer::DMASequencer(const Params *p)
- : RubyPort(p)
+ : RubyPort(p)
{
}
-void DMASequencer::init()
+void
+DMASequencer::init()
{
- RubyPort::init();
- m_is_busy = false;
- m_data_block_mask = ~ (~0 << RubySystem::getBlockSizeBits());
+ RubyPort::init();
+ m_is_busy = false;
+ m_data_block_mask = ~ (~0 << RubySystem::getBlockSizeBits());
}
-RequestStatus DMASequencer::makeRequest(const RubyRequest & request)
+RequestStatus
+DMASequencer::makeRequest(const RubyRequest &request)
{
- uint64_t paddr = request.paddr;
- uint8_t* data = request.data;
- int len = request.len;
- bool write = false;
- switch(request.type) {
- case RubyRequestType_LD:
- write = false;
- break;
- case RubyRequestType_ST:
- write = true;
- break;
- case RubyRequestType_NULL:
- case RubyRequestType_IFETCH:
- case RubyRequestType_Locked_Read:
- case RubyRequestType_Locked_Write:
- case RubyRequestType_RMW_Read:
- case RubyRequestType_RMW_Write:
- case RubyRequestType_NUM:
- panic("DMASequencer::makeRequest does not support the RubyRequestType");
- return RequestStatus_NULL;
- }
-
- assert(!m_is_busy); // only support one outstanding DMA request
- m_is_busy = true;
-
- active_request.start_paddr = paddr;
- active_request.write = write;
- active_request.data = data;
- active_request.len = len;
- active_request.bytes_completed = 0;
- active_request.bytes_issued = 0;
- active_request.pkt = request.pkt;
-
- SequencerMsg msg;
- msg.getPhysicalAddress() = Address(paddr);
- msg.getLineAddress() = line_address(msg.getPhysicalAddress());
- msg.getType() = write ? SequencerRequestType_ST : SequencerRequestType_LD;
- int offset = paddr & m_data_block_mask;
-
- msg.getLen() = (offset + len) <= RubySystem::getBlockSizeBytes() ?
- len :
- RubySystem::getBlockSizeBytes() - offset;
-
- if (write) {
- msg.getDataBlk().setData(data, offset, msg.getLen());
- }
-
- assert(m_mandatory_q_ptr != NULL);
- m_mandatory_q_ptr->enqueue(msg);
- active_request.bytes_issued += msg.getLen();
-
- return RequestStatus_Issued;
+ uint64_t paddr = request.paddr;
+ uint8_t* data = request.data;
+ int len = request.len;
+ bool write = false;
+ switch(request.type) {
+ case RubyRequestType_LD:
+ write = false;
+ break;
+ case RubyRequestType_ST:
+ write = true;
+ break;
+ case RubyRequestType_NULL:
+ case RubyRequestType_IFETCH:
+ case RubyRequestType_Locked_Read:
+ case RubyRequestType_Locked_Write:
+ case RubyRequestType_RMW_Read:
+ case RubyRequestType_RMW_Write:
+ case RubyRequestType_NUM:
+ panic("DMASequencer::makeRequest does not support RubyRequestType");
+ return RequestStatus_NULL;
+ }
+
+ assert(!m_is_busy); // only support one outstanding DMA request
+ m_is_busy = true;
+
+ active_request.start_paddr = paddr;
+ active_request.write = write;
+ active_request.data = data;
+ active_request.len = len;
+ active_request.bytes_completed = 0;
+ active_request.bytes_issued = 0;
+ active_request.pkt = request.pkt;
+
+ SequencerMsg msg;
+ msg.getPhysicalAddress() = Address(paddr);
+ msg.getLineAddress() = line_address(msg.getPhysicalAddress());
+ msg.getType() = write ? SequencerRequestType_ST : SequencerRequestType_LD;
+ int offset = paddr & m_data_block_mask;
+
+ msg.getLen() = (offset + len) <= RubySystem::getBlockSizeBytes() ?
+ len : RubySystem::getBlockSizeBytes() - offset;
+
+ if (write) {
+ msg.getDataBlk().setData(data, offset, msg.getLen());
+ }
+
+ assert(m_mandatory_q_ptr != NULL);
+ m_mandatory_q_ptr->enqueue(msg);
+ active_request.bytes_issued += msg.getLen();
+
+ return RequestStatus_Issued;
}
-void DMASequencer::issueNext()
+void
+DMASequencer::issueNext()
{
- assert(m_is_busy == true);
- active_request.bytes_completed = active_request.bytes_issued;
- if (active_request.len == active_request.bytes_completed) {
- ruby_hit_callback(active_request.pkt);
- m_is_busy = false;
- return;
- }
-
- SequencerMsg msg;
- msg.getPhysicalAddress() = Address(active_request.start_paddr +
- active_request.bytes_completed);
-
- assert((msg.getPhysicalAddress().getAddress() & m_data_block_mask) == 0);
- msg.getLineAddress() = line_address(msg.getPhysicalAddress());
-
- msg.getType() = (active_request.write ? SequencerRequestType_ST :
- SequencerRequestType_LD);
-
- msg.getLen() = (active_request.len -
- active_request.bytes_completed < RubySystem::getBlockSizeBytes() ?
- active_request.len - active_request.bytes_completed :
- RubySystem::getBlockSizeBytes());
-
- if (active_request.write) {
- msg.getDataBlk().setData(&active_request.data[active_request.bytes_completed],
- 0, msg.getLen());
- msg.getType() = SequencerRequestType_ST;
- } else {
- msg.getType() = SequencerRequestType_LD;
- }
-
- assert(m_mandatory_q_ptr != NULL);
- m_mandatory_q_ptr->enqueue(msg);
- active_request.bytes_issued += msg.getLen();
+ assert(m_is_busy == true);
+ active_request.bytes_completed = active_request.bytes_issued;
+ if (active_request.len == active_request.bytes_completed) {
+ ruby_hit_callback(active_request.pkt);
+ m_is_busy = false;
+ return;
+ }
+
+ SequencerMsg msg;
+ msg.getPhysicalAddress() = Address(active_request.start_paddr +
+ active_request.bytes_completed);
+
+ assert((msg.getPhysicalAddress().getAddress() & m_data_block_mask) == 0);
+ msg.getLineAddress() = line_address(msg.getPhysicalAddress());
+
+ msg.getType() = (active_request.write ? SequencerRequestType_ST :
+ SequencerRequestType_LD);
+
+ msg.getLen() =
+ (active_request.len -
+ active_request.bytes_completed < RubySystem::getBlockSizeBytes() ?
+ active_request.len - active_request.bytes_completed :
+ RubySystem::getBlockSizeBytes());
+
+ if (active_request.write) {
+ msg.getDataBlk().
+ setData(&active_request.data[active_request.bytes_completed],
+ 0, msg.getLen());
+ msg.getType() = SequencerRequestType_ST;
+ } else {
+ msg.getType() = SequencerRequestType_LD;
+ }
+
+ assert(m_mandatory_q_ptr != NULL);
+ m_mandatory_q_ptr->enqueue(msg);
+ active_request.bytes_issued += msg.getLen();
}
-void DMASequencer::dataCallback(const DataBlock & dblk)
+void
+DMASequencer::dataCallback(const DataBlock & dblk)
{
- assert(m_is_busy == true);
- int len = active_request.bytes_issued - active_request.bytes_completed;
- int offset = 0;
- if (active_request.bytes_completed == 0)
- offset = active_request.start_paddr & m_data_block_mask;
- assert( active_request.write == false );
- memcpy(&active_request.data[active_request.bytes_completed],
- dblk.getData(offset, len), len);
- issueNext();
+ assert(m_is_busy == true);
+ int len = active_request.bytes_issued - active_request.bytes_completed;
+ int offset = 0;
+ if (active_request.bytes_completed == 0)
+ offset = active_request.start_paddr & m_data_block_mask;
+ assert(active_request.write == false);
+ memcpy(&active_request.data[active_request.bytes_completed],
+ dblk.getData(offset, len), len);
+ issueNext();
}
-void DMASequencer::ackCallback()
+void
+DMASequencer::ackCallback()
{
- issueNext();
+ issueNext();
}
-void DMASequencer::printConfig(ostream & out)
+void
+DMASequencer::printConfig(ostream & out)
{
-
}
-
DMASequencer *
DMASequencerParams::create()
{