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author | Nilay Vaish <nilay@cs.wisc.edu> | 2012-07-12 08:39:19 -0500 |
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committer | Nilay Vaish <nilay@cs.wisc.edu> | 2012-07-12 08:39:19 -0500 |
commit | b913af440b17b1eb146afafb2ce5a1577910dde1 (patch) | |
tree | 60bd72c6f057d9b6a3b56a482fb0523ff18ed18b /src/mem/ruby/system/RubyMemoryControl.cc | |
parent | ce4e9a9a50e9c80a132de881e486a4f9b5561fc0 (diff) | |
download | gem5-b913af440b17b1eb146afafb2ce5a1577910dde1.tar.xz |
Ruby: remove config information from ruby.stats
This patch removes printConfig() functions from all structures in Ruby.
Most of the information is already part of config.ini, and where ever it
is not, it would become in due course.
Diffstat (limited to 'src/mem/ruby/system/RubyMemoryControl.cc')
-rw-r--r-- | src/mem/ruby/system/RubyMemoryControl.cc | 31 |
1 files changed, 0 insertions, 31 deletions
diff --git a/src/mem/ruby/system/RubyMemoryControl.cc b/src/mem/ruby/system/RubyMemoryControl.cc index 4879f4fa6..54585e275 100644 --- a/src/mem/ruby/system/RubyMemoryControl.cc +++ b/src/mem/ruby/system/RubyMemoryControl.cc @@ -362,37 +362,6 @@ RubyMemoryControl::print(ostream& out) const } void -RubyMemoryControl::printConfig(ostream& out) -{ - out << "Memory Control " << name() << ":" << endl; - out << " Ruby cycles per memory cycle: " << m_mem_bus_cycle_multiplier - << endl; - out << " Basic read latency: " << m_mem_ctl_latency << endl; - if (m_mem_fixed_delay) { - out << " Fixed Latency mode: Added cycles = " << m_mem_fixed_delay - << endl; - } else { - out << " Bank busy time: " << m_bank_busy_time << " memory cycles" - << endl; - out << " Memory channel busy time: " << m_basic_bus_busy_time << endl; - out << " Dead cycles between reads to different ranks: " - << m_rank_rank_delay << endl; - out << " Dead cycle between a read and a write: " - << m_read_write_delay << endl; - out << " tFaw (four-activate) window: " << m_tFaw << endl; - } - out << " Banks per rank: " << m_banks_per_rank << endl; - out << " Ranks per DIMM: " << m_ranks_per_dimm << endl; - out << " DIMMs per channel: " << m_dimms_per_channel << endl; - out << " LSB of bank field in address: " << m_bank_bit_0 << endl; - out << " LSB of rank field in address: " << m_rank_bit_0 << endl; - out << " LSB of DIMM field in address: " << m_dimm_bit_0 << endl; - out << " Max size of each bank queue: " << m_bank_queue_size << endl; - out << " Refresh period (within one bank): " << m_refresh_period << endl; - out << " Arbitration randomness: " << m_mem_random_arbitrate << endl; -} - -void RubyMemoryControl::clearStats() const { m_profiler_ptr->clearStats(); |