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author | Joel Hestness <hestness@cs.wisc.edu> | 2012-09-05 20:51:41 -0500 |
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committer | Joel Hestness <hestness@cs.wisc.edu> | 2012-09-05 20:51:41 -0500 |
commit | 6924e10978c5847fa33cf33c50f5b3511bf89ee4 (patch) | |
tree | 8da38ae3e1bb57b6b97604ef143cc903b40a2814 /src/mem/ruby/system/RubyMemoryControl.py | |
parent | 494f6a858e47db3e5352468f504e82af01b931f9 (diff) | |
download | gem5-6924e10978c5847fa33cf33c50f5b3511bf89ee4.tar.xz |
Ruby Memory Controller: Fix clocking
Diffstat (limited to 'src/mem/ruby/system/RubyMemoryControl.py')
-rw-r--r-- | src/mem/ruby/system/RubyMemoryControl.py | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/mem/ruby/system/RubyMemoryControl.py b/src/mem/ruby/system/RubyMemoryControl.py index f79ed9b18..e65b6f5cc 100644 --- a/src/mem/ruby/system/RubyMemoryControl.py +++ b/src/mem/ruby/system/RubyMemoryControl.py @@ -36,6 +36,8 @@ class RubyMemoryControl(MemoryControl): cxx_class = 'RubyMemoryControl' version = Param.Int(""); + # Override the default clock + clock = '400MHz' banks_per_rank = Param.Int(8, ""); ranks_per_dimm = Param.Int(2, ""); dimms_per_channel = Param.Int(2, ""); |