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| author | Joel Hestness <hestness@cs.utexas.edu> | 2011-02-06 22:14:18 -0800 |
|---|---|---|
| committer | Joel Hestness <hestness@cs.utexas.edu> | 2011-02-06 22:14:18 -0800 |
| commit | dedb4fbf058c96597cd48e506e4a3479b192d9aa (patch) | |
| tree | a55a9c77fbe1b91d2ff7d59e25b0a3f814c39625 /src/mem/ruby/system/RubyPort.cc | |
| parent | 82844618fd91338ad54d3fcf7ea9fa088b04ab1a (diff) | |
| download | gem5-dedb4fbf058c96597cd48e506e4a3479b192d9aa.tar.xz | |
Ruby: Fix to return cache block size to CPU for split data transfers
Diffstat (limited to 'src/mem/ruby/system/RubyPort.cc')
| -rw-r--r-- | src/mem/ruby/system/RubyPort.cc | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/src/mem/ruby/system/RubyPort.cc b/src/mem/ruby/system/RubyPort.cc index d1c306bb2..305228a8f 100644 --- a/src/mem/ruby/system/RubyPort.cc +++ b/src/mem/ruby/system/RubyPort.cc @@ -370,3 +370,9 @@ RubyPort::M5Port::isPhysMemAddress(Addr addr) } return false; } + +unsigned +RubyPort::M5Port::deviceBlockSize() const +{ + return (unsigned) RubySystem::getBlockSizeBytes(); +} |