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author | Andreas Hansson <andreas.hansson@arm.com> | 2012-03-22 06:36:27 -0400 |
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committer | Andreas Hansson <andreas.hansson@arm.com> | 2012-03-22 06:36:27 -0400 |
commit | c2d2ea99e3efe13bc50d410e2eeae9dd6757e57f (patch) | |
tree | 5836cc125091b436dee3fbc32ef26e1eeed49a6c /src/mem/ruby/system/RubyPort.cc | |
parent | fb395b56dd2432b862c550bad7b4bbe1f205ec59 (diff) | |
download | gem5-c2d2ea99e3efe13bc50d410e2eeae9dd6757e57f.tar.xz |
MEM: Split SimpleTimingPort into PacketQueue and ports
This patch decouples the queueing and the port interactions to
simplify the introduction of the master and slave ports. By separating
the queueing functionality from the port itself, it becomes much
easier to distinguish between master and slave ports, and still retain
the queueing ability for both (without code duplication).
As part of the split into a PacketQueue and a port, there is now also
a hierarchy of two port classes, QueuedPort and SimpleTimingPort. The
QueuedPort is useful for ports that want to leave the packet
transmission of outgoing packets to the queue and is used by both
master and slave ports. The SimpleTimingPort inherits from the
QueuedPort and adds the implemention of recvTiming and recvFunctional
through recvAtomic.
The PioPort and MessagePort are cleaned up as part of the changes.
--HG--
rename : src/mem/tport.cc => src/mem/packet_queue.cc
rename : src/mem/tport.hh => src/mem/packet_queue.hh
Diffstat (limited to 'src/mem/ruby/system/RubyPort.cc')
-rw-r--r-- | src/mem/ruby/system/RubyPort.cc | 15 |
1 files changed, 6 insertions, 9 deletions
diff --git a/src/mem/ruby/system/RubyPort.cc b/src/mem/ruby/system/RubyPort.cc index aff129b50..aca6604c6 100644 --- a/src/mem/ruby/system/RubyPort.cc +++ b/src/mem/ruby/system/RubyPort.cc @@ -98,21 +98,18 @@ RubyPort::getPort(const std::string &if_name, int idx) RubyPort::PioPort::PioPort(const std::string &_name, RubyPort *_port) - : SimpleTimingPort(_name, _port) + : QueuedPort(_name, _port, queue), queue(*_port, *this), ruby_port(_port) { DPRINTF(RubyPort, "creating port to ruby sequencer to cpu %s\n", _name); - ruby_port = _port; } RubyPort::M5Port::M5Port(const std::string &_name, RubyPort *_port, RubySystem *_system, bool _access_phys_mem) - : SimpleTimingPort(_name, _port) + : QueuedPort(_name, _port, queue), queue(*_port, *this), + ruby_port(_port), ruby_system(_system), + _onRetryList(false), access_phys_mem(_access_phys_mem) { DPRINTF(RubyPort, "creating port from ruby sequcner to cpu %s\n", _name); - ruby_port = _port; - ruby_system = _system; - _onRetryList = false; - access_phys_mem = _access_phys_mem; } Tick @@ -648,7 +645,7 @@ bool RubyPort::M5Port::sendNextCycle(PacketPtr pkt) { //minimum latency, must be > 0 - schedSendTiming(pkt, curTick() + (1 * g_eventQueue_ptr->getClock())); + queue.schedSendTiming(pkt, curTick() + (1 * g_eventQueue_ptr->getClock())); return true; } @@ -656,7 +653,7 @@ bool RubyPort::PioPort::sendNextCycle(PacketPtr pkt) { //minimum latency, must be > 0 - schedSendTiming(pkt, curTick() + (1 * g_eventQueue_ptr->getClock())); + queue.schedSendTiming(pkt, curTick() + (1 * g_eventQueue_ptr->getClock())); return true; } |