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author | Andreas Hansson <andreas.hansson@arm.com> | 2012-03-30 09:42:36 -0400 |
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committer | Andreas Hansson <andreas.hansson@arm.com> | 2012-03-30 09:42:36 -0400 |
commit | a128ba7cd1ab506e3468c82c1060a7fb4ad909b1 (patch) | |
tree | 626dc6046e0c8edb99a7f7a9db4c8ef7d8664636 /src/mem/ruby/system/RubyPort.hh | |
parent | f9d403a7b95c50a8b75f8442101eb87ca465f967 (diff) | |
download | gem5-a128ba7cd1ab506e3468c82c1060a7fb4ad909b1.tar.xz |
Ruby: Remove the physMemPort and instead access memory directly
This patch removes the physMemPort from the RubySequencer and instead
uses the system pointer to access the physmem. The system already
keeps track of the physmem and the valid memory address ranges, and
with this patch we merely make use of that existing functionality. The
memory is modified so that it is possible to call the access functions
(atomic and functional) without going through the port, and the memory
is allowed to be unconnected, i.e. have no ports (since Ruby does not
attach it like the conventional memory system).
Diffstat (limited to 'src/mem/ruby/system/RubyPort.hh')
-rw-r--r-- | src/mem/ruby/system/RubyPort.hh | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/src/mem/ruby/system/RubyPort.hh b/src/mem/ruby/system/RubyPort.hh index d97f6e69e..553614021 100644 --- a/src/mem/ruby/system/RubyPort.hh +++ b/src/mem/ruby/system/RubyPort.hh @@ -175,8 +175,6 @@ class RubyPort : public MemObject uint16_t m_port_id; uint64_t m_request_cnt; - PioPort physMemPort; - /** Vector of M5 Ports attached to this Ruby port. */ typedef std::vector<M5Port*>::iterator CpuPortIter; std::vector<M5Port*> slave_ports; @@ -184,8 +182,8 @@ class RubyPort : public MemObject Event *drainEvent; - PhysicalMemory* physmem; RubySystem* ruby_system; + System* system; // // Based on similar code in the M5 bus. Stores pointers to those ports |